Approach: Conduct and sponsor research projects to refine understanding and enhance confidence in technologies, structures, and methodologies that will accelerate the availability of petaflops to NASA applications. Direct initiatives will include: 1) applications scaling performance and requirements studies, 2) detailed model of the natural evolution COTS based clustered approach, 3) design study of architecture exploiting a mix of advanced techologies, 4) devise innovative approaches to system software, and 5) conduct Community Led Forums to engage the broad community in addressing critical issues.
Accomplishments: A point design study under NSF, NASA, and DARPA sponsorship is being conducted to determine the design space trade-offs of a multi-threaded architecture with a deep memory hierarchy using superconductor RSFQ logic, optical interconnect, and holographic storage. A second innovative non-von Neumann architecture approach, Continuum Computer Architecture (CCA), is being developed to make superior use of semiconductor technology. A study of a space science application is underway to scale to petaflops. The Petaflops Architecture Workshop (PAWS'96) was held in April, 1996 to explore a range of design concepts. The draft of the report was delivered in June.
Significance: The importance of this work is to bring petaflops capability to NASA mission critical objectives in the earliest possible time frame. Such capabilities are essential for Earth science applications such as climate modeling, space science applications such as simulation of galactic and cosmological structures and astrophysics for solar and stellar modeling. It is key to adequate data assimilation from Earth orbiting space craft monitoring the atmosphere and oceans and deep space spacecraft engaged in direct planetary exploration. NASA can provide leadership crucial to this advancement in the future as it has already in the past.
Status/Plans: The Petaflops Architecture Workshop identified many critical areas in which advances can and should be made to enhance our understanding of potential approaches and reduce the risk to achieving petaflops computing capability in the earliest possible time-frame. Some immediate actions would be to 1) Conduct a detailed point design study of COTS based MIMD petaflops architecture; 2) Perform detailed applications studies of the three archtypical petaflops architecture classes and determine the potential for special purpose structures; 3) Develop latency-tolerant algorithm methods; 4) Design and simulate a hybrid technology architecture incorporating superconducting logic, optical communications, a semiconductor memory hierarchy, and a 3-D holographic storage; 5) Develop an approach for accelerating progress in superconducting memory, submicron fabrication, and interconnect technology.
Point of Contact:
Thomas Sterling
Jet Propulsion Laboratory
(818) 354-1793