From ST REPORT > ATW & Inmos STR FOCUS A Comprehensive look at the ATW's future ===================== H1 INMOS TRANSPUTER CHIP AND THE RACE FOR TERA FLOPS ==================================================== by Mike Stepansky Has the Atari Transputer Workstation (ATW) been discontinued by the Atari U.K. officials? I think this rumor is somewhat over- exaggerated, but I do know that transputer technology is NOT dead in the private sectors and in certain universities. Also, I was not surprised to learn that most transputer scientists argue that parallel-processing computer will be and should be the next wave of computer technology after the today's limited processors architecture, like those current RISC or CISC architecture implementations. Anyway, I have been told that this fall will mark the 4th anniversary of the introduction of the INMOS T-800 Transputer microprocessor. In the first few years the T800 had by far out performed its competition such as Intels' 80386 and Motorola's 68020. Even in conjunction with their corresponding floating point coprocessors such as the 80387 or 68881, the competition could not surpass the performance of the T800 with its on-chip floating point unit. In the meantime, the competition has not slept. More and more powerful devices have been introduced to the market. At times, it appears that the microprocessor development groups are coming out with new products even faster than Detroit's three giants issue their new car models. In traditional computer technologies, as we all know, performance increases are gained by faster and faster CPU's. This puts microprocessor vendors under pressure to provide the market in very short development cycles with new and faster devices which quite often are not completely designed or show only minor improvements (a gain in performance by a factor 2). On the other hand, Transputer based parallel processor technology is inherently scalable so that additional performance can be gained by increasing the number of processors and not by waiting for the next generation. Although the T800 has been in production for almost 4 years, T800 systems have been able to grow with performance requirements up to the present and most likely could continue do so. If the competition does not sleep neither does Inmos. Without the pressure of issuing a minor enhancement each year, the Transputer developers at Inmos have used the time to make real improvements. Basically, 2 major advantages are realized with the H1 (codename for the latest Inmos Transputer chip): 1) A 10 fold increase of processor and communication links performance. This results in a 20 MFLOPS and 150 MIPS, thus giving you a total data throughput of 80 megabytes per second. Think about it! This is now available on a SINGLE chip! This puts an end to those worrisomes when you need higher clock frequency in today's serial processors (Intel or Motorola), yet where the law of quantum physics intervene. 2) Also, there is a modified channel communication protocol in conjunction with an on-chip Virtual Channel Processor (VCP) and a new switching chip (called C104) allowing each processor to send messages directly to any other processor. This is done without requiring any intermediary processors between sender and reciever (wormhole routing). Every processor can be every other processors direct neighbor. Hypercube fashion is no problem at all! In addition to these improvements, the H1 will be binary code compatible with the T800 so that software developed on the Txxx series can be directly transferred to an H1 system. The result of this will be that H1 systems will have far better software support with development environments and application software than any other device of its performance class which is used in MIMD machines. Also, there will be special hardware components available which can interface between the Transputer links from the Txxx seres and an H1 link. Specifically these features allow the integration of the performance enhancements of the H1 transputer directly in existing Transputer environments. All previously developed (or purchased) Transputer host system interfaces or Transputer I/O modules can be used in conjunction with H1 components. "So...What is the name of the company that sells and develops the state-of-the-art transputer?" you might ask. Unfortunately, not just Atari U.K., but Parsytec, as I have been told, is an independent system manufacturer located in West Chicago, Illinois. Parsytec has chosen the microprocessor it will use for their future systems very carefully. Parsytec has decided to stay with Inmos in developing the next generation of distributed memory processing systems. The European Economic Community has awarded Parsytec, together with 4 other partners, a contract to design a General Purpose MIMD Computer based on the H1 microprocessor device. It is interesting to note that Parsytec informed me that their partner in U.K. already bought one or two ATW's and planned on improving it to H1 transputer chip in Europe! Their goal is "to develop an effective architecture for general purpose parallel computers." Additionally, Parsytec's trust in the new H1 is so strong that they have decided to lead the European Teraflop Initiative (ETI) with a proposal for a 2^16 (65,536) H1 system with a scheduled delivery date late in 1993. Let's hope if they win the 1.6 TERAFLOPS race in their H1 system! Well, to close this statement, I am still looking forward to Atari U.S. to integrate this H1 Inmos system in their future system, if possible and by all means necessary to save Atari position financially in the 1990s. By the way, news just in from Inmos: H1 has just been named "T9000"! Welcome to the true 32- bit parallel computer world! Is ATW dead? I doubt it and the price tag continues to drop, thus making today's RISC and CISC chip look outdated, depending on applications. <<<<*>>>><<<<*>>>><<<<*>>>>