| From: | Frank Wille |
| Date: | 18 Jul 2000 at 21:18:58 |
| Subject: | Re: Run68k yet a trouble |
Almos Rajnai wrote:
> > for PPC. Currently you will need
> >
> > lwz r11,@__PowerPCBase(r2)
>
> That is for because _PowerPCBase located in the data segment of the
> 68k, and I did not merged together -> only the address is in the TOC
> area.
Correct.
> (It is not possible to force 68k data area to the TOC? Of
> course without merging all togteher.)
It is possible. Just access _PowerPCBase directly via r2 and vlink
is forced to merge "DATA" and ".tocd" (which is normally not what
you want).
> > A section is not PPC cache aligned, which means 32-bytes aligned.
>
> That was really a suprise to me. It is not mentioned anywhere in the
> developer docs,
Which developer docs? :)
> and may cause dangerous cache underruns. Why does
> loadseg not patched in some way then?
The startup code for C programs already implements the 32-bytes
buffer, so there is only a problem when you are doing everything
yourself in assembler.
I think Sam prefered to omit every patch which is not absolutely
necessary. There are already too many patches in most systems.
> > stwu r1,-160(r1) # new SF: 160 bytes should be enough
>
> 160 bytes? 32 not enough? What is the exact value?
24 Bytes for the stack frame and sizeof(struct PPCArgs) for your
structure. When I didn't miscount, it should be 24 + 144 = 168
bytes, so 160 was not enough - sorry.
Rounded to the next 16-bytes boundary, I would take 176 bytes here.