Simtel MSDOS 1992 December

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Wrap

Assembly Source File | 1987-03-04 | 15KB | 653 lines

.org 0 stest: acall stest ajmp * ljmp *+5 ;jump over next line of code add a,#00 sjmp *-9 ;jump to stest add a,#h'ff add a,00 add a,h'ff add a,@r0 add a,@r1 add a,r0 ;test all 8051 opcodes in all configurations add a,r1 ;all machine mnemonics copyright Intel corp. 1976 add a,r2 add a,r3 add a,r4 add a,r5 add a,r6 add a,r7 addc a,#00 addc a,#h'ff addc a,00 addc a,h'ff addc a,@r0 addc a,@r1 addc a,r0 addc a,r1 addc a,r2 addc a,r3 addc a,r4 addc a,r5 addc a,r6 addc a,r7 ajmp stest anl a,#00 anl a,#h'ff anl a,00 anl a,h'ff anl a,@r0 anl a,@r1 anl a,r0 anl a,r1 anl a,r2 anl a,r3 anl a,r4 anl a,r5 anl a,r6 anl a,r7 anl h'00,a anl h'ff,a anl h'00,#00 anl h'00,#h'ff anl h'ff,#00 anl h'ff,#h'ff anl c,00 anl c,h'ff anl c,/00 anl c,/h'ff cjne a,h'00,stest cjne a,h'ff,stest cjne a,#h'00,stest cjne a,#h'ff,stest cjne r0,#h'00,stest cjne r7,#h'ff,stest cjne @r0,#h'00,stest cjne @r1,#h'ff,stest clr a clr h'00 clr h'ff clr c cpl a cpl h'00 cpl h'ff cpl c da a dec a dec r0 dec r1 dec r2 dec r3 dec r4 dec r5 dec r6 dec r7 dec h'00 dec h'ff dec @r0 dec @r1 div ab loop1: djnz r0,loop1 djnz r1,loop1 djnz r2,loop1 djnz r3,loop1 djnz r4,loop1 djnz r5,loop1 djnz r6,loop1 djnz r7,loop1 djnz h'00,loop1 djnz h'ff,loop1 inc a inc r0 inc r1 inc r2 inc r3 inc r4 inc r5 inc r6 inc r7 inc h'00 inc h'ff inc @r0 inc @r1 inc dptr loop: jb h'00,loop jb h'ff,loop jbc h'00,loop jbc h'ff,loop jc loop jmp @a+dptr jnb h'00,loop jnb h'ff,loop jnc loop jnz loop jz loop lcall stest ljmp stest mov a,r0 mov a,r1 mov a,r2 mov a,r3 mov a,r4 mov a,r5 mov a,r6 mov a,r7 mov a,h'00 mov a,h'ff mov a,@r0 mov a,@r1 mov a,#h'00 mov a,#h'ff mov r0,#h'00 mov r0,#h'ff mov r0,h'00 mov r0,h'ff mov r0,a mov r1,#h'00 mov r1,#h'ff mov r1,h'00 mov r1,h'ff mov r1,a mov r2,#h'00 mov r2,#h'ff mov r2,h'00 mov r2,h'ff mov r2,a mov r3,#h'00 mov r3,#h'ff mov r3,h'00 mov r3,h'ff mov r3,a mov r4,#h'00 mov r4,#h'ff mov r4,h'00 mov r4,h'ff mov r4,a mov r5,#h'00 mov r5,#h'ff mov r5,h'00 mov r5,h'ff mov r5,a mov r6,#h'00 mov r6,#h'ff mov r6,h'00 mov r6,h'ff mov r6,a mov r7,#h'00 mov r7,#h'ff mov r7,h'00 mov r7,h'ff mov r7,a mov h'00,a mov h'00,r0 mov h'00,r1 mov h'00,r2 mov h'00,r3 mov h'00,r4 mov h'00,r5 mov h'00,r6 mov h'00,r7 mov h'00,h'00 mov h'00,h'ff mov h'00,@r0 mov h'00,@r1 mov h'00,#h'00 mov h'00,#h'ff mov h'ff,a mov h'ff,r0 mov h'ff,r1 mov h'ff,r2 mov h'ff,r3 mov h'ff,r4 mov h'ff,r5 mov h'ff,r6 mov h'ff,r7 mov h'ff,h'00 mov h'ff,h'ff mov h'ff,@r0 mov h'ff,@r1 mov h'ff,#h'00 mov h'ff,#h'ff mov @r0,#h'00 mov @r0,#h'ff mov @r0,h'00 mov @r0,h'ff mov @r0,a mov @r1,#h'00 mov @r1,#h'ff mov @r1,h'00 mov @r1,h'ff mov @r1,a mov c,h'00 mov c,h'ff mov h'00,c mov h'ff,c mov dptr,#h'00ff mov dptr,#h'ff00 movc a,@a+dptr movc a,@a+pc movx a,@r0 movx a,@r1 movx a,@dptr movx @r0,a movx @r1,a movx @dptr,a mul ab nop orl a,#00 orl a,#h'ff orl a,00 orl a,h'ff orl a,@r0 orl a,@r1 orl a,r0 orl a,r1 orl a,r2 orl a,r3 orl a,r4 orl a,r5 orl a,r6 orl a,r7 orl h'00,a orl h'ff,a orl h'00,#00 orl h'00,#h'ff orl h'ff,#00 orl h'ff,#h'ff orl c,00 orl c,h'ff orl c,/00 orl c,/h'ff pop h'00 pop h'ff push h'00 push h'ff ret reti rl a rlc a rr a rrc a setb h'00 setb h'ff setb c rloop2: sjmp rloop2 subb a,#00 subb a,#h'ff subb a,00 subb a,h'ff subb a,@r0 subb a,@r1 subb a,r0 ;test all 8051 opcodes in all configurations subb a,r1 ;all machine mnemonics copyright Intel corp. 1976 subb a,r2 subb a,r3 subb a,r4 subb a,r5 subb a,r6 subb a,r7 swap a xch a,@r0 xch a,@r1 xch a,r0 xch a,r1 xch a,r2 xch a,r3 xch a,r4 xch a,r5 xch a,r6 xch a,r7 xch a,h'00 xch a,h'ff xchd a,@r0 xchd a,@r1 xrl a,#00 xrl a,#h'ff xrl a,00 xrl a,h'ff xrl a,@r0 xrl a,@r1 xrl a,r0 xrl a,r1 xrl a,r2 xrl a,r3 xrl a,r4 xrl a,r5 xrl a,r6 xrl a,r7 xrl h'00,a xrl h'ff,a xrl h'00,#00 xrl h'00,#h'ff xrl h'ff,#00 xrl h'ff,#h'ff acall stest add a,#forward2 add a,#forward1 add a,00 add a,forward1 add a,@r0 add a,@r1 add a,r0 ;test all 8051 opcodes in all configurations add a,r1 ;all machine mnemonics copyright Intel corp. 1976 add a,r2 add a,r3 add a,r4 add a,r5 add a,r6 add a,r7 addc a,#forward2 addc a,#forward1 addc a,00 addc a,forward1 addc a,@r0 addc a,@r1 addc a,r0 addc a,r1 addc a,r2 addc a,r3 addc a,r4 addc a,r5 addc a,r6 addc a,r7 ajmp stest anl a,#forward2 anl a,#forward1 anl a,00 anl a,forward1 anl a,@r0 anl a,@r1 anl a,r0 anl a,r1 anl a,r2 anl a,r3 anl a,r4 anl a,r5 anl a,r6 anl a,r7 anl forward2,a anl forward1,a anl forward2,#forward2 anl forward2,#forward1 anl forward1,#forward2 anl forward1,#forward1 anl c,00 anl c,forward1 anl c,/00 anl c,/forward1 rloop3: cjne a,forward2,rloop3 cjne a,forward1,rloop3 cjne a,#forward2,rloop3 cjne a,#forward1,rloop3 cjne r0,#forward2,rloop3 cjne r1,#forward1,rloop3 cjne r2,#forward2,rloop3 cjne r3,#forward1,rloop3 cjne r4,#forward2,rloop3 cjne r5,#forward1,rloop3 cjne r6,#forward2,rloop3 cjne r7,#forward1,rloop3 cjne @r0,#forward2,rloop3 cjne @r1,#forward1,rloop3 clr a clr forward2 clr forward1 clr c cpl a cpl forward2 cpl forward1 cpl c da a dec a dec r0 dec r1 dec r2 dec r3 dec r4 dec r5 dec r6 dec r7 dec forward2 dec forward1 dec @r0 dec @r1 div ab loop2: djnz r0,loop2 djnz r1,loop2 djnz r2,loop2 djnz r3,loop2 djnz r4,loop2 djnz r5,loop2 djnz r6,loop2 djnz r7,loop2 djnz forward2,loop2 djnz forward1,loop2 inc a inc r0 inc r1 inc r2 inc r3 inc r4 inc r5 inc r6 inc r7 inc forward2 inc forward1 inc @r0 inc @r1 inc dptr loop3: jb forward2,loop3 jb forward1,loop3 jbc forward2,loop3 jbc forward1,loop3 jc loop3 jmp @a+dptr jnb forward2,loop3 jnb forward1,loop3 jnc loop3 jnz loop3 jz loop3 lcall stest ljmp stest mov a,r0 mov a,r1 mov a,r2 mov a,r3 mov a,r4 mov a,r5 mov a,r6 mov a,r7 mov a,forward2 mov a,forward1 mov a,@r0 mov a,@r1 mov a,#forward2 mov a,#forward1 mov r0,#forward2 mov r0,#forward1 mov r0,forward2 mov r0,forward1 mov r0,a mov r1,#forward2 mov r1,#forward1 mov r1,forward2 mov r1,forward1 mov r1,a mov r2,#forward2 mov r2,#forward1 mov r2,forward2 mov r2,forward1 mov r2,a mov r3,#forward2 mov r3,#forward1 mov r3,forward2 mov r3,forward1 mov r3,a mov r4,#forward2 mov r4,#forward1 mov r4,forward2 mov r4,forward1 mov r4,a mov r5,#forward2 mov r5,#forward1 mov r5,forward2 mov r5,forward1 mov r5,a mov r6,#forward2 mov r6,#forward1 mov r6,forward2 mov r6,forward1 mov r6,a mov r7,#forward2 mov r7,#forward1 mov r7,forward2 mov r7,forward1 mov r7,a mov forward2,a mov forward2,r0 mov forward2,r1 mov forward2,r2 mov forward2,r3 mov forward2,r4 mov forward2,r5 mov forward2,r6 mov forward2,r7 mov forward2,forward2 mov forward2,forward1 mov forward2,@r0 mov forward2,@r1 mov forward2,#forward2 mov forward2,#forward1 mov forward1,a mov forward1,r0 mov forward1,r1 mov forward1,r2 mov forward1,r3 mov forward1,r4 mov forward1,r5 mov forward1,r6 mov forward1,r7 mov forward1,forward2 mov forward1,forward1 mov forward1,@r0 mov forward1,@r1 mov forward1,#forward2 mov forward1,#forward1 mov @r0,#forward2 mov @r0,#forward1 mov @r0,forward2 mov @r0,forward1 mov @r0,a mov @r1,#forward2 mov @r1,#forward1 mov @r1,forward2 mov @r1,forward1 mov @r1,a mov c,forward2 mov c,forward1 mov forward2,c mov forward1,c mov dptr,#forward2ff mov dptr,#forward100 movc a,@a+dptr movc a,@a+pc movx a,@r0 movx a,@r1 movx a,@dptr movx @r0,a movx @r1,a movx @dptr,a mul ab nop orl a,#forward2 orl a,#forward1 orl a,00 orl a,forward1 orl a,@r0 orl a,@r1 orl a,r0 orl a,r1 orl a,r2 orl a,r3 orl a,r4 orl a,r5 orl a,r6 orl a,r7 orl forward2,a orl forward1,a orl forward2,#forward2 orl forward2,#forward1 orl forward1,#forward2 orl forward1,#forward1 orl c,00 orl c,forward1 orl c,/00 orl c,/forward1 pop forward2 pop forward1 push forward2 push forward1 ret reti rl a rlc a rr a rrc a setb forward2 setb forward1 setb c rloop: sjmp rloop subb a,#forward2 subb a,#forward1 subb a,00 subb a,forward1 subb a,@r0 subb a,@r1 subb a,r0 ;test all 8051 opcodes in all configurations subb a,r1 ;all machine mnemonics copyright Intel corp. 1976 subb a,r2 subb a,r3 subb a,r4 subb a,r5 subb a,r6 subb a,r7 swap a xch a,@r0 xch a,@r1 xch a,r0 xch a,r1 xch a,r2 xch a,r3 xch a,r4 xch a,r5 xch a,r6 xch a,r7 xch a,forward2 xch a,forward1 xchd a,@r0 xchd a,@r1 xrl a,#forward2 xrl a,#forward1 xrl a,00 xrl a,forward1 xrl a,@r0 xrl a,@r1 xrl a,r0 xrl a,r1 xrl a,r2 xrl a,r3 xrl a,r4 xrl a,r5 xrl a,r6 xrl a,r7 xrl forward2,a xrl forward1,a xrl forward2,#forward2 xrl forward2,#forward1 xrl forward1,#forward2 xrl forward1,#forward1 synctst: farloop: .equ forward1,h'ff .equ forward2,h'00 .end