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1991-11-20
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489 lines
245F-1C1 A 6-2 Arrow always points to the "N" material|Metal Oxide Semiconductor forms a capacitor|Which drawings look like a capacitor
What is the schematic symbol for an N-channel MOSFET?
| ├────── D ├────── D
A. │ │ B. │
│ ├─<─┐ G ────>─┤
│ │ │ │
G ─────┘ ├───┴── S ├────── S
├────── D ├────── D
C. │ D. │ │
G ────<─┤ │ ├─>─┐
│ │ │ │
├────── S G ────┘ ├───┴── S
*
246F-1C2 B 6-2 Arrow always points to the "N" material|If the channel is "P" type, arrow points out|Which drawings look like a capacitor
What is the schematic symbol for an P-channel MOSFET?
| E \ ├────── B2 ├────── D
A. > │ B. │ │
\│ │ ├─>─┐
├────── B1 │ │ │
G ─────┘ ├───┴── S
├────── D
C. │ │ D. E \ ├────── B2
│ ├─<─┐ < │
│ │ │ \│
G ─────┘ ├───┴── D ├────── B1
*
247F-1C3 C 6-2 Arrow always points to the "N" material|Metal Oxide Semiconductor forms a capacitor|Which drawings look like dual capacitors
What is the schematic symbol for an N-channel dual-gate MOSFET?
| ├────── D
A. /──── C B. │ │
│ / G2 ─────┘ ├─>─┐
B ────┤\ │ │ │
│ < G1 ─────┘ ├───┴── S
\──── E
├────── D /──── C
C. │ │ D. │ /
G2 ─────┘ ├─<─┐ B ────┤\
│ │ │ │ >
G1 ─────┘ ├───┴── S \──── E
*
248F-1C4 D 6-2 Arrow always points to the "N" material|If the channel is "P" type, arrow points out|Which drawings look like dual capacitors
What is the schematic symbol for an P-channel dual-gate MOSFET?
| ├────── D ├────── D
A. │ │ B. │ │
G2 ─────┘ ├─<─┐ │ ├─>─┐
│ │ │ │ │ │
G1 ─────┘ ├───┴── S G ─────┘ ├───┴── S
├────── D ├────── D
C. │ │ D. │ │
│ ├─<─┐ G2 ─────┘ ├─>─┐
│ │ │ │ │ │
G ─────┘ ├───┴── S G1 ─────┘ ├───┴── S
*
249F-1C5 D 6-3 Metal Oxide Semiconductor forms a capacitor|This capacitor is very thin, thus it has a |low breakdown(puncture) voltage
Why do many MOSFET devices have built-in gate-protective Zener
diodes?
A. The gate-protective Zener diode provides a voltage reference
to provide the correct amount of reverse-bias gate voltage
B. The gate-protective Zener diode protects the substrate from
excessive voltages
C. The gate-protective Zener diode keeps the gate voltage within
specifications to prevent the device from overheating
D. The gate-protective Zener diode prevents the gate insulation
from being punctured by small static charges or excessive
voltages
*
250F-1D1 C 6-3 Metal Oxide Semiconductor forms a capacitor
What do the initials CMOS stand for?
A. Common mode oscillating system
B. Complementary mica-oxide silicon
C. Complementary metal-oxide semiconductor
D. Complementary metal-oxide substrate
*
251F-1D2 A 6-3 Metal Oxide Semiconductor forms a very thin |capacitor that has a low breakdown(puncture)|voltage, easily damaged by static charges
Why are special precautions necessary in handling FET and
CMOS devices?
A. The are susceptible to damage from static charges
B. They have fragile leads that may break off
C. They have micro-welded semiconductor junctions that
are susceptible to breakage
D. They are light sensitive
*
252F-1E1 A 6-2 Arrow always points to the "N" material |All FETs have Gates, Drains, and Sources
What is the schematic symbol for an N-channel junction FET?
| ├────── D E \ ├────── B2
A. │ B. < │
G ────>─┤ \│
│ ├────── B1
├────── S
E \ ├───── B2 ├────── D
C. > │ D. │
\│ G ────<─┤
├───── B1 │
├────── S
*
253F-1E2 D 6-1 A tube is a field effect device, any help?|Usually there is no gate current in a FET |Bipolars have a base current Ib=Ic/ß
How does the input impedance of a field-effect transistor
compare with that of a bipolar transistor?
A. One cannot compare input impedance with out first
knowing the supply voltage
B. An FET has low input impedance; a bipolar transistor
has a high input impedance
C. The input impedance of FETs and bipolar transistors
is the same
D. An FET has high input impedance; a bipolar transistor
has a low input impedance
*
254F-1E3 D 6-1 All FETs have Gates, Drains, and Sources
What are the three terminals of a field-effect transistor?
A. Gate 1, gate 2, drain
B. Emitter, base, collector
C. Emitter, base 1, base 2
D. Gate, drain, source
*
255F-1F1 B 6-2 All FETs have Gates, Drains, and Sources|Arrow always points to the "N" material |If the channel is "P" type, arrow points out
What is the schematic symbol for an P-channel junction FET?
| /──── C ├────── D
A. │ / B. │
B ────┤\ G ────<─┤
│ < │
\──── E ├────── S
├────── D /─── C
C. │ D. │ /
G ────>─┤ B ────┤\
│ │ >
├────── S \─── E
*
256F-1F2 A 6-1 Time to go to the A & P|Or was that the N & P?
What are the basic types of junction field-effect transistors?
A. N-channel and P-channel
B. High power and low power
C. MOSFET and GaAsFET
D. Silicon FET and germanium FET
*
257F-2.1 A 6-4 Key words, differential amplifier
What is an operational amplifier?
A. A high-gain, direct coupled differential amplifier
whose characteristics are determined by components
external to the amplifier unit
B. A high-gain, direct coupled audio amplifier whose
characteristics are determined by components external
to the amplifier unit
C. An amplifier used to increase the average output of
frequency modulated amateur signals to the legal limit
D. A program subroutine that calculates the gain of an
RF amplifier
*
258F-2.2 A 6-5 Differential amplifier, two inputs|Looks like a piece of pie
What is the schematic symbol for an operational amplifier?
| / \ ┌─────── \
A. ───┤ \ B. ───┤ \
│ \ │ ├───
│ ├───── ───┤ /
│ / └─────── /
───┤ /
\ /
┌───────\ │ \
\ \ │ \
C. ───┤ \ D. │ \
│ ├─── ────┤ ├────
───┤ / │ /
/ / │ /
└───────/ │ /
*
259F-2.3 B 6-4 To B or not to B, that is the...|High input Z will not load previous stage|Low output Z will drive almost anything
What would be the characteristics of the ideal op-amp?
A. Zero input impedance, infinite output impedance,
infinite gain, flat frequency response
B. Infinite input impedance, zero output impedance,
infinite gain, flat frequency response
C. Zero input impedance, zero output impedance,
infinite gain, flat frequency response
D. Infinite input impedance, infinite output impedance,
infinite gain, flat frequency response
*
260F-2.4 A 6-5 External components
What determines the gain of a closed-loop op-amp circuit?
A. The external feedback network
B. The collector-to-base capacitance of the PNP stage
C. The power supply voltage
D. The PNP collector load
*
261F-2.5 C 6-6 Differential amplifier, two inputs|Op-amp in a closed-loop condition
What is meant by the term op-amp offset voltage?
A. The output voltage of the op-amp minus its input voltage
B. The difference between the output voltage of the op-amp
and the input voltage required in the following stage
C. The potential between the amplifier-input terminals of
the op-amp in a closed-loop condition
D. The potential between the amplifier-input terminals of
the op-amp in a open-loop condition
*
262F-2.6 D 6-4 High input Z will not load previous stage|Low output Z will drive almost anything
What is the input impedance of a theoretically ideal op-amp?
A. 100 ohms
B. 1000 ohms
C. Very low
D. Very high
*
263F-2.7 A 6-4 High input Z will not load previous stage|Low output Z will drive almost anything
What is the output impedance of a theoretically ideal op-amp?
A. Very low
B. Very high
C. 100 ohms
D. 1000 ohms
*
264F-3.1 D 6-7 Phase detector |Low-pass filter|VCO
What is a phase-locked loop circuit?
A. An electronic servo loop consisting of a ratio detector,
reactance modulator, and voltage-controlled oscillator
B. An electronic circuit also known as a monostable multivibrator
C. An electronic circuit consisting of a precision push-pull
amplifier with a differential input
D. An electronic servo loop consisting of a phase detector,
a low-pass filter, and voltage-controlled oscillator
*
265F-3.2 D 6-7 Frequency synthesis is one use
What functions are performed by a phase-locked loop?
A. Wideband AF and RF power amplification
B. Comparison of two digital input signals, digital pulse counter
C. Photovoltaic conversion, optical coupling
D. Frequency synthesis, FM demodulation
*
266F-3.3 B 6-7 Phase-locked loop
A circuit compares the output from a voltage-controlled oscillator
and a frequency standard. The difference between the two
frequencies produces an error voltage that changes the voltage-
controlled oscillator frequency. What is the name of the circuit?
A. A doubly balanced mixer
B. A phase-locked loop
C. A differential voltage amplifier
D. A variable frequency oscillator
*
267F-4.1 B 6-9 Tamale & Taco for Lunch
What do the initials TTL stand for?
A. Resistor-transistor logic
B. Transistor-transistor logic
C. Diode-transistor logic
D. Emitter-coupled logic
*
268F-4.2 C 6-9 Five Alive
What is the recommended power supply voltage for TTL series
integrated circuits?
A. 12.00 volts
B. 50.00 volts
C. 5.00 volts
D. 13.60 volts
*
269F-4.3 A 6-10 TTL inputs must be pulled low |since they assume a high logic|state if they are left open
What logic state do the inputs of a TTL device assume
if they are left open?
A. A high logic state
B. A low logic state
C. The device becomes randomized and will not provide
consistent high or low logic states
D. Open inputs on a TTL device are ignored
*
270F-4.4 A 6-9 2.0 to 5.5
What level of input voltage is high in a TTL device operating
with a 5-volt power supply?
A. 2.0 to 5.5 volts
B. 1.5 to 3.0 volts
C. 1.0 to 1.5 volts
D. -5.0 to -2.0 volts
*
271F-4.5 C 6-9 -0.6 to 0.8
What level of input voltage is low in a TTL device operating
with a 5-volt power supply?
A. -2.0 to -5.5 volts
B. 2.0 to 5.5 volts
C. -0.6 to 0.8 volts
D. -0.8 to 0.4 volts
*
272F-4.6 D 6-10 To bypass switching transients and prevent|them from appearing on the supply line
Why do circuits containing TTL devices have several bypass
capacitors per printed circuit board?
A. To prevent RFI to receivers
B. To keep the switching noise within the circuit, thus
eliminating RFI
C. To filter out switching harmonics
D. To prevent switch transients from appearing on the supply
line
*
273F-5.1 B 6-10 Complementary Metal Oxide Semiconductor |Are Ns & Ps anything like males & females?
What is a CMOS IC?
A. A chip with only P-channel transistors
B. A chip with P-channel and N-channel transistors
C. A chip with only N-channel transistors
D. A chip with only bipolar transistors
*
274F-5.2 B 6-10 Define devices, digital logic ICs?|In that case, I'll take B
What is one major advantage of CMOS over other devices?
A. Small size
B. Low current consumption
C. Low cost
D. Ease of circuit design
*
275F-5.3 C 6-10 CMOS digital ICs output switches almost the|entire power supply voltage and the input |switching point is half of the PS voltage
Why do CMOS digital integrated circuits have high immunity to
noise on the input signal or power supply?
A. Larger bypass capacitors are used in CMOS circuit design
B. The input switching threshold is about two times the power
supply voltage
C. The input switching threshold is about one-half the power
supply voltage
D. Input signals are stronger
*
276F-6.1 C 6-11 Look mom, |I,m on the|Vidicon
What is the name for a vacuum tube that is commonly found in
television cameras used for amateur television?
A. A traveling-wave tube
B. A klystron tube
C. A vidicon tube
D. A cathode-ray tube
*
277F-6.2 D 6-11 Key word Field, Electromagnetic this time
How is the electron beam deflected in a vidicon?
A. By varying the beam voltage
B. By varying the bias voltage on the beam forming
grids in the tube
C. By varying the beam current
D. By varying electromagnetic fields
*
278F-6.3 D 6-12 And I thought static meant|that it didn't move or change
What type of CRT deflection is better when high-frequency waves
are to be displayed on the screen?
A. Electromagnetic
B. Tubular
C. Radar
D. Electrostatic
*
279G-1A1 D 7-1 One for the Flip|One for the Flop
What is a flip-flop circuit?
A. A binary sequential logic element with one stable state
B. A binary sequential logic element with eight stable states
C. A binary sequential logic element with four stable states
D. A binary sequential logic element with two stable states
*
280G-1A2 A 7-1 The output is either a 1 or a 0. Therefore|it can only hold a single bit of information
How many bits of information can be stored in a single flip-flop
circuit?
A. 1
B. 2
C. 3
D. 4
*
281G-1A3 C 7-1 A flip-flop aka a bistable|multivibrator is sometimes|called a latch
What is a bistable multivibrator circuit?
A. An "AND" gate
B. An "OR" gate
C. A flip-flop
D. A clock
*
282G-1A4 C 7-4 The first trigger changes the ouput.|The second pulse changes it back. So|you get one level change per trigger
How many output changes are obtained for every two trigger pulses
applied to the input of a bistable T flip-flop circuit?
A. No output level changes
B. One output level change
C. Two output level changes
D. Four output level changes
*
283G-1A5 C 7-4 A bistable multivibrator, aka a flip-flop,|divides by two. The first trigger changes|the ouput. The second pulse changes it back
The frequency of an ac signal can be divided electronically by
what type of digital circuit?
A. A free-running multivibrator
B. An OR gate
C. A bistable multivibrator
D. A astable multivibrator
*
284G-1A6 C 7-1 A flip-flop aka a bistable|multivibrator is sometimes|called a latch
What type of digital IC is also known as a latch?
A. A decade counter
B. An OR gate
C. A flip-flop
D. An op-amp
*
285G-1A7 B 7-4 A flip-flop divides by two. The first|trigger changes the ouput. The second|pulse changes it back
How many flip-flops are required to divide a signal frequency
by 4?
A. 1
B. 2
C. 4
D. 8
*
286G-1B1 D 7-6 Define Astable? |An Unstable barn?
What is an astable multivibrator?
A. A circuit that alternates between two stable states
B. A circuit that alternates between a stable state and
an unstable state
C. A circuit set to block either a 0 pulse or a 1 pulse
and pass the other
D. A circuit that alternates between two unstable states
*
287G-1B2 A 7-4 A circuit that can be switched momentarily|to the opposite binary state
What is an monostable multivibrator?
A. A circuit that can be switched momentarily to the
opposite binary state and then returns after a set
time to its original state
B. A "clock" circuit circuit that produces a continuous
square wave oscillating between 1 and 0
C. A circuit designed to store one bit of data in either
the 0 or the 1 configuration
D. A circuit that maintains a constant output voltage,
regardless of variations in the input voltage
*
288G-1C1 A 7-7 1 AND 1 = 1|0 AND 1 = 0|1 AND 0 = 0
What is an AND gate?
A. A circuit that produces a logic "1" at its output
only if all inputs are logic "1"
B. A circuit that produces a logic "0" at its output
only if all inputs are logic "1"
C. A circuit that produces a logic "1" at its output
if only one input is a logic "1"
D. A circuit that produces a logic "1" at its output
if all inputs are logic "0"
*
289G-1C2 A 7-7 Two (or more) inputs, one output|Left side drawn with straight line
What is the schematic symbol for an AND gate?
| ┌─────── \ │ \
A. ───┤ \ B. │ \
│ ├─── │ \
───┤ / ────┤ ├────
└─────── / │ /
│ /
│ /
┌───────\
\ \
C. ───┤ \ D. │ \
│ ├─── │ \
───┤ / ────┤ ├O───
/ / │ /
└───────/ │ /
*
290G-1C3 D 7-8 Not(1 AND 1) = 0
What is a NAND gate?
A. A circuit that produces a logic "0" at its output
only when all inputs are logic "0"
B. A circuit that produces a logic "1" at its output
only when all inputs are logic "1"
C. A circuit that produces a logic "0" at its output
if some but not all of its inputs are logic "1"
D. A circuit that produces a logic "0" at its output
only when all inputs are logic "1"
*
291G-1C4 B 7-8 NOT bubble on output of AND gate|Left side drawn with straight line
What is the schematic symbol for an NAND gate?
| ┌───────\
\ \ ┌─────── \
A. ──O┤ \ B. ───┤ \
│ ├O── │ ├O──
──O┤ / ───┤ /
/ / └─────── /
└───────/
┌───────\
\ \ ┌─────── \
C. ───┤ \ D. ──O┤ \
│ ├O── │ ├O──
───┤ / ──O┤ /
/ / └─────── /
└───────/
*
292G-1C5 A 7-8 1 OR 1 = 1|1 OR 0 = 1|0 OR 1 = 1
What is an OR gate?
A. A circuit that produces a logic "1" at its output
if any input is logic "1"
B. A circuit that produces a logic "0" at its output
if any input is logic "1"
C. A circuit that produces a logic "0" at its output
if all inputs are logic "1"
D. A circuit that produces a logic "1" at its output
if all inputs are logic "0"
*
293G-1C6 D 7-8 Two (or more) inputs, one output|Left side drawn with curved line
What is the schematic symbol for an OR gate?
| ┌─────── \ │ \
A. ───┤ \ B. │ \
│ ├─── ────┤ ├O───
───┤ / │ /
└─────── / │ /
│ \ ┌───────\
│ \ \ \
C. │ \ D. ───┤ \
────┤ ├──── │ ├───
│ / ───┤ /
│ / / /
│ / └───────/
*
