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1990-12-28
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58KB
From: markz@ssc.UUCP (Mark Zenier)
Newsgroups: alt.sources
Subject: Frankenstein Cross Assemblers, Zilog Z80 flavor, part 2 of 2
Message-ID: <619@ssc.UUCP>
Date: 6 Dec 90 07:32:29 GMT
---- Cut Here and feed the following to sh ----
#!/bin/sh
# This is part 02 of Frankasm/Asz80
# ============= asz80.y ==============
if test -f 'asz80.y' -a X"$1" != X"-c"; then
echo 'x - skipping asz80.y (File already exists)'
else
echo 'x - extracting asz80.y (Text)'
sed 's/^X//' << 'SHAR_EOF' > 'asz80.y' &&
X%{
X
X/*
XHEADER: ;
XTITLE: Frankenstein Cross Assemblers;
XVERSION: 2.0;
XDESCRIPTION: " Reconfigurable Cross-assembler producing Intel (TM)
X Hex format object records. ";
XKEYWORDS: cross-assemblers, 1805, 2650, 6301, 6502, 6805, 6809,
X 6811, tms7000, 8048, 8051, 8096, z8, z80;
XSYSTEM: UNIX, MS-Dos ;
XFILENAME: asz80.y;
XWARNINGS: "This software is in the public domain.
X Any prior copyright claims are relinquished.
X
X This software is distributed with no warranty whatever.
X The author takes no responsibility for the consequences
X of its use.
X
X Yacc (or Bison) required to compile." ;
XSEE-ALSO: asz80.doc,frasmain.c;
XAUTHORS: Mark Zenier;
XCOMPILERS: Microport Sys V/AT, ATT Yacc, Turbo C V1.5, Bison (CUG disk 285)
X (previous versions Xenix, Unisoft 68000 Version 7, Sun 3);
X*/
X/* framework crossassembler for z80 + and minus */
X/* November 17, 1990 */
X
X/*
X description frame work parser description for framework cross
X assemblers
X history February 2, 1988
X September 11, 1990 - merge table definition
X September 12, 1990 - short file names
X September 14, 1990 - short variable names
X September 17, 1990 - use yylex as external
X*/
X#include <stdio.h>
X#include "frasmdat.h"
X#include "fragcon.h"
X
X#define yylex lexintercept
X
X/*
X file critz80.h
X author Mark Zenier
X description selection critera and syntax type defines for
X the z80 frasm (framework cross assembler)
X usage Unix
X history January 22, 1988
X*/
X
X/* xxxx.0000.0000.0000 cpu mask selection for all instructions */
X
X#define CPUMASK 0xf000
X
X#define CPU8080 0x1000
X#define CPU8085 0x3000
X#define CPUZ80 0x7000
X#define CPU64180 0xf000
X
X#define TS8080PLUS 0x1000
X#define TS8085PLUS 0x2000
X#define TSZ80PLUS 0x4000
X#define TS64180 0x8000
X
X/* 0000.0000.0xxx.xxxx double register select bits for B02, CC01, LD02, LD03,
X LD05, LD06, LD07, LD08, LD09, LD10, LD12, N03, N04, N05,
X N07, N11 */
X#define DRMASK 0x7f
X#define DRIX 1
X#define DRIY 2
X#define DRSP 4
X#define DRHL 8
X#define DRDE 0x10
X#define DRBC 0x20
X#define DRAF 0x40
X
X/* 0000.0xxx.x000.0000 destination select bits */
X#define DRDESTMASK 0x780
X#define DRDESTSP 0x80
X#define DRDESTHL 0x100
X#define DRDESTIX 0x200
X#define DRDESTIY 0x300
X
X/* 0000.x000.0000.0000 register is accum for LD02, LD10 */
X
X#define REGISA 0x800
X
X/* register field values for instructions */
X
X#define VALREGA 7
X#define VALREGB 0
X#define VALREGC 1
X#define VALREGD 2
X#define VALREGE 3
X#define VALREGH 4
X#define VALREGL 5
X
X#define ST_B01 0x1
X#define ST_B02 0x2
X#define ST_B03 0x4
X/* 0000.0000.xxxx.xxxx condition select */
X#define CCSELMASK 0x00ff
X#define CCSELNZ 0x0001
X#define CCSELZ 0x0002
X#define CCSELNC 0x0004
X#define CCSELC 0x0008
X#define CCSELPO 0x0010
X#define CCSELPE 0x0020
X#define CCSELP 0x0040
X#define CCSELM 0x0080
X#define ST_CC01 0x1
X#define ST_CC02 0x2
X#define ST_CC03 0x4
X#define ST_CC04 0x8
X#define ST_CC05 0x10
X#define ST_EX01 0x1
X#define EXMASK 0xf
X/* 0000.0000.0000.00xx */
X#define EX2AF 1
X#define EX2HL 2
X/* 0000.0000.0000.xx00 */
X#define EX1AF 4
X#define EX1DE 8
X#define ST_EX02 0x2
X#define ST_IM01 0x1
X/* 0000.0000.0000.0xxx interrupt mode select bits */
X#define INTSETMASK 7
X#define INTSETMODE0 1
X#define INTSETMODE1 2
X#define INTSETMODE2 4
X#define ST_IO01 0x1
X#define ST_IO02 0x2
X#define ST_IO03 0x4
X#define ST_IO04 0x8
X#define ST_LD01 0x1
X#define ST_LD02 0x2
X#define ST_LD03 0x4
X#define ST_LD04 0x8
X#define ST_LD05 0x10
X#define ST_LD06 0x20
X#define ST_LD07 0x40
X#define ST_LD08 0x80
X#define ST_LD09 0x100
X#define ST_LD10 0x200
X#define ST_LD11 0x400
X#define ST_LD12 0x800
X#define ST_LD13 0x1000
X#define ST_LD14 0x2000
X#define ST_LD15 0x4000
X/* 0000.0000.0000.00xx */
X#define SPECIALRMASK 3
X#define SPECIALIR 1
X#define SPECIALRR 2
X#define ST_LD16 0x8000
X#define ST_N01 0x1
X#define ST_N02 0x2
X#define ST_N04 0x4
X#define ST_N05 0x8
X#define ST_N06 0x10
X#define ST_N07 0x20
X#define ST_N08 0x40
X#define ST_N09 0x80
X#define ST_N10 0x100
X#define ST_N11 0x200
X#define ST_N12 0x400
X#define ST_R01 0x1
X
X unsigned int cpuselect = CPU64180;
X static char genbdef[] = "[1=];";
X static char genwdef[] = "[1=]y";
X char ignosyn[] = "[Xinvalid syntax for instruction";
X char ignosel[] = "[Xinvalid operands/illegal instruction for cpu";
X
X long labelloc;
X static int satsub;
X int ifstkpt = 0;
X int fraifskip = FALSE;
X
X struct symel * endsymbol = SYMNULL;
X
X%}
X%union {
X int intv;
X long longv;
X char *strng;
X struct symel *symb;
X struct { int indsel, exp; } indexstruc;
X}
X%token <intv> SREGI
X%token <intv> SREGR
X%token <intv> REGA
X%token <intv> REGB
X%token <intv> REGC
X%token <intv> REGD
X%token <intv> REGE
X%token <intv> REGH
X%token <intv> REGL
X%token <intv> DREGAF
X%token <intv> DREGBC
X%token <intv> DREGDE
X%token <intv> DREGHL
X%token <intv> DREGIX
X%token <intv> DREGIY
X%token <intv> DREGSP
X%token <intv> CONDZ
X%token <intv> CONDNZ
X%token <intv> CONDNC
X%token <intv> CONDPE
X%token <intv> CONDPO
X%token <intv> CONDP
X%token <intv> CONDM
X
X%type <intv> dreg condition reg8 specialr ixoriy topexpr
X%type <indexstruc> index
X%token <intv> KOC_BDEF
X%token <intv> KOC_ELSE
X%token <intv> KOC_END
X%token <intv> KOC_ENDI
X%token <intv> KOC_EQU
X%token <intv> KOC_IF
X%token <intv> KOC_INCLUDE
X%token <intv> KOC_ORG
X%token <intv> KOC_RESM
X%token <intv> KOC_SDEF
X%token <intv> KOC_SET
X%token <intv> KOC_WDEF
X%token <intv> KOC_CHSET
X%token <intv> KOC_CHDEF
X%token <intv> KOC_CHUSE
X%token <intv> KOC_CPU
X%token <intv> KOC_bit
X%token <intv> KOC_ccop
X%token <intv> KOC_exop
X%token <intv> KOC_intmode
X%token <intv> KOC_ioop
X%token <intv> KOC_ldop
X%token <intv> KOC_opcode
X%token <intv> KOC_restart
X
X%token <longv> CONSTANT
X%token EOL
X%token KEOP_AND
X%token KEOP_DEFINED
X%token KEOP_EQ
X%token KEOP_GE
X%token KEOP_GT
X%token KEOP_HIGH
X%token KEOP_LE
X%token KEOP_LOW
X%token KEOP_LT
X%token KEOP_MOD
X%token KEOP_MUN
X%token KEOP_NE
X%token KEOP_NOT
X%token KEOP_OR
X%token KEOP_SHL
X%token KEOP_SHR
X%token KEOP_XOR
X%token KEOP_locctr
X%token <symb> LABEL
X%token <strng> STRING
X%token <symb> SYMBOL
X
X%token KTK_invalid
X
X%right KEOP_HIGH KEOP_LOW
X%left KEOP_OR KEOP_XOR
X%left KEOP_AND
X%right KEOP_NOT
X%nonassoc KEOP_GT KEOP_GE KEOP_LE KEOP_LT KEOP_NE KEOP_EQ
X%left '+' '-'
X%left '*' '/' KEOP_MOD KEOP_SHL KEOP_SHR
X%right KEOP_MUN
X
X
X%type <intv> expr exprlist stringlist
X
X%start file
X
X%%
X
Xfile : file allline
X | allline
X ;
X
Xallline : line EOL
X {
X clrexpr();
X }
X | EOL
X | error EOL
X {
X clrexpr();
X yyerrok;
X }
X ;
X
Xline : LABEL KOC_END
X {
X endsymbol = $1;
X nextreadact = Nra_end;
X }
X | KOC_END
X {
X nextreadact = Nra_end;
X }
X | KOC_INCLUDE STRING
X {
X if(nextfstk >= FILESTKDPTH)
X {
X fraerror("include file nesting limit exceeded");
X }
X else
X {
X infilestk[nextfstk].fnm = savestring($2,strlen($2));
X if( (infilestk[nextfstk].fpt = fopen($2,"r"))
X ==(FILE *)NULL )
X {
X fraerror("cannot open include file");
X }
X else
X {
X nextreadact = Nra_new;
X }
X }
X }
X | LABEL KOC_EQU expr
X {
X if($1 -> seg == SSG_UNDEF)
X {
X pevalexpr(0, $3);
X if(evalr[0].seg == SSG_ABS)
X {
X $1 -> seg = SSG_EQU;
X $1 -> value = evalr[0].value;
X prtequvalue("C: 0x%lx\n",
X evalr[0].value);
X }
X else
X {
X fraerror(
X "noncomputable expression for EQU");
X }
X }
X else
X {
X fraerror(
X "cannot change symbol value with EQU");
X }
X }
X | LABEL KOC_SET expr
X {
X if($1 -> seg == SSG_UNDEF
X || $1 -> seg == SSG_SET)
X {
X pevalexpr(0, $3);
X if(evalr[0].seg == SSG_ABS)
X {
X $1 -> seg = SSG_SET;
X $1 -> value = evalr[0].value;
X prtequvalue("C: 0x%lx\n",
X evalr[0].value);
X }
X else
X {
X fraerror(
X "noncomputable expression for SET");
X }
X }
X else
X {
X fraerror(
X "cannot change symbol value with SET");
X }
X }
X | KOC_IF expr
X {
X if((++ifstkpt) < IFSTKDEPTH)
X {
X pevalexpr(0, $2);
X if(evalr[0].seg == SSG_ABS)
X {
X if(evalr[0].value != 0)
X {
X elseifstk[ifstkpt] = If_Skip;
X endifstk[ifstkpt] = If_Active;
X }
X else
X {
X fraifskip = TRUE;
X elseifstk[ifstkpt] = If_Active;
X endifstk[ifstkpt] = If_Active;
X }
X }
X else
X {
X fraifskip = TRUE;
X elseifstk[ifstkpt] = If_Active;
X endifstk[ifstkpt] = If_Active;
X }
X }
X else
X {
X fraerror("IF stack overflow");
X }
X }
X
X | KOC_IF
X {
X if(fraifskip)
X {
X if((++ifstkpt) < IFSTKDEPTH)
X {
X elseifstk[ifstkpt] = If_Skip;
X endifstk[ifstkpt] = If_Skip;
X }
X else
X {
X fraerror("IF stack overflow");
X }
X }
X else
X {
X yyerror("syntax error");
X YYERROR;
X }
X }
X
X | KOC_ELSE
X {
X switch(elseifstk[ifstkpt])
X {
X case If_Active:
X fraifskip = FALSE;
X break;
X
X case If_Skip:
X fraifskip = TRUE;
X break;
X
X case If_Err:
X fraerror("ELSE with no matching if");
X break;
X }
X }
X
X | KOC_ENDI
X {
X switch(endifstk[ifstkpt])
X {
X case If_Active:
X fraifskip = FALSE;
X ifstkpt--;
X break;
X
X case If_Skip:
X fraifskip = TRUE;
X ifstkpt--;
X break;
X
X case If_Err:
X fraerror("ENDI with no matching if");
X break;
X }
X }
X | LABEL KOC_ORG expr
X {
X pevalexpr(0, $3);
X if(evalr[0].seg == SSG_ABS)
X {
X locctr = labelloc = evalr[0].value;
X if($1 -> seg == SSG_UNDEF)
X {
X $1 -> seg = SSG_ABS;
X $1 -> value = labelloc;
X }
X else
X fraerror(
X "multiple definition of label");
X prtequvalue("C: 0x%lx\n",
X evalr[0].value);
X }
X else
X {
X fraerror(
X "noncomputable expression for ORG");
X }
X }
X | KOC_ORG expr
X {
X pevalexpr(0, $2);
X if(evalr[0].seg == SSG_ABS)
X {
X locctr = labelloc = evalr[0].value;
X prtequvalue("C: 0x%lx\n",
X evalr[0].value);
X }
X else
X {
X fraerror(
X "noncomputable expression for ORG");
X }
X }
X | LABEL KOC_CHSET
X {
X if($1 -> seg == SSG_UNDEF)
X {
X $1 -> seg = SSG_EQU;
X if( ($1->value = chtcreate()) <= 0)
X {
X fraerror( "cannot create character translation table");
X }
X prtequvalue("C: 0x%lx\n", $1 -> value);
X }
X else
X {
X fraerror( "multiple definition of label");
X }
X }
X | KOC_CHUSE
X {
X chtcpoint = (int *) NULL;
X prtequvalue("C: 0x%lx\n", 0L);
X }
X | KOC_CHUSE expr
X {
X pevalexpr(0, $2);
X if( evalr[0].seg == SSG_ABS)
X {
X if( evalr[0].value == 0)
X {
X chtcpoint = (int *)NULL;
X prtequvalue("C: 0x%lx\n", 0L);
X }
X else if(evalr[0].value < chtnxalph)
X {
X chtcpoint = chtatab[evalr[0].value];
X prtequvalue("C: 0x%lx\n", evalr[0].value);
X }
X else
X {
X fraerror("nonexistent character translation table");
X }
X }
X else
X {
X fraerror("noncomputable expression");
X }
X }
X | KOC_CHDEF STRING ',' exprlist
X {
X int findrv, numret, *charaddr;
X char *sourcestr = $2, *before;
X
X if(chtnpoint != (int *)NULL)
X {
X for(satsub = 0; satsub < $4; satsub++)
X {
X before = sourcestr;
X
X pevalexpr(0, exprlist[satsub]);
X findrv = chtcfind(chtnpoint, &sourcestr,
X &charaddr, &numret);
X if(findrv == CF_END)
X {
X fraerror("more expressions than characters");
X break;
X }
X
X if(evalr[0].seg == SSG_ABS)
X {
X switch(findrv)
X {
X case CF_UNDEF:
X {
X if(evalr[0].value < 0 ||
X evalr[0].value > 255)
X {
X frawarn("character translation value truncated");
X }
X *charaddr = evalr[0].value & 0xff;
X prtequvalue("C: 0x%lx\n", evalr[0].value);
X }
X break;
X
X case CF_INVALID:
X case CF_NUMBER:
X fracherror("invalid character to define",
X before, sourcestr);
X break;
X
X case CF_CHAR:
X fracherror("character already defined",
X before, sourcestr);
X break;
X }
X }
X else
X {
X fraerror("noncomputable expression");
X }
X }
X
X if( *sourcestr != '\0')
X {
X fraerror("more characters than expressions");
X }
X }
X else
X {
X fraerror("no CHARSET statement active");
X }
X
X }
X | LABEL
X {
X if($1 -> seg == SSG_UNDEF)
X {
X $1 -> seg = SSG_ABS;
X $1 -> value = labelloc;
X prtequvalue("C: 0x%lx\n", labelloc);
X
X }
X else
X fraerror(
X "multiple definition of label");
X }
X | labeledline
X ;
X
Xlabeledline : LABEL genline
X {
X if($1 -> seg == SSG_UNDEF)
X {
X $1 -> seg = SSG_ABS;
X $1 -> value = labelloc;
X }
X else
X fraerror(
X "multiple definition of label");
X labelloc = locctr;
X }
X
X | genline
X {
X labelloc = locctr;
X }
X ;
X
Xgenline : KOC_BDEF exprlist
X {
X genlocrec(currseg, labelloc);
X for( satsub = 0; satsub < $2; satsub++)
X {
X pevalexpr(1, exprlist[satsub]);
X locctr += geninstr(genbdef);
X }
X }
X | KOC_SDEF stringlist
X {
X genlocrec(currseg, labelloc);
X for(satsub = 0; satsub < $2; satsub++)
X {
X locctr += genstring(stringlist[satsub]);
X }
X }
X | KOC_WDEF exprlist
X {
X genlocrec(currseg, labelloc);
X for( satsub = 0; satsub < $2; satsub++)
X {
X pevalexpr(1, exprlist[satsub]);
X locctr += geninstr(genwdef);
X }
X }
X | KOC_RESM expr
X {
X pevalexpr(0, $2);
X if(evalr[0].seg == SSG_ABS)
X {
X locctr = labelloc + evalr[0].value;
X prtequvalue("C: 0x%lx\n", labelloc);
X }
X else
X {
X fraerror(
X "noncomputable result for RMB expression");
X }
X }
X ;
X
Xexprlist : exprlist ',' expr
X {
X exprlist[nextexprs ++ ] = $3;
X $$ = nextexprs;
X }
X | expr
X {
X nextexprs = 0;
X exprlist[nextexprs ++ ] = $1;
X $$ = nextexprs;
X }
X ;
X
Xstringlist : stringlist ',' STRING
X {
X stringlist[nextstrs ++ ] = $3;
X $$ = nextstrs;
X }
X | STRING
X {
X nextstrs = 0;
X stringlist[nextstrs ++ ] = $1;
X $$ = nextstrs;
X }
X ;
X
X
Xline : KOC_CPU STRING
X {
X if( ! cpumatch($2))
X {
X fraerror("unknown cpu type, 64180 assumed");
X cpuselect = CPU64180;
X }
X }
X ;
Xgenline : KOC_bit expr ',' '(' DREGHL ')'
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1,$2);
X if(evalr[1].seg != SSG_ABS ||
X evalr[1].value < 0 ||
X evalr[1].value > 7)
X {
X evalr[1].value = 0;
X fraerror("impossible bit number");
X }
X evalr[1].value <<= 3;
X locctr += geninstr(findgen($1, ST_B01, cpuselect));
X }
X ;
Xgenline : KOC_bit expr ',' index
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1,$2);
X if(evalr[1].seg != SSG_ABS ||
X evalr[1].value < 0 ||
X evalr[1].value > 7)
X {
X evalr[1].value = 0;
X fraerror("impossible bit number");
X }
X evalr[1].value <<= 3;
X pevalexpr(2, $4.exp);
X locctr += geninstr(findgen($1, ST_B02, cpuselect|$4.indsel));
X }
X ;
Xgenline : KOC_bit expr ',' reg8
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1,$2);
X if(evalr[1].seg != SSG_ABS ||
X evalr[1].value < 0 ||
X evalr[1].value > 7)
X {
X evalr[1].value = 0;
X fraerror("impossible bit number");
X }
X evalr[1].value = (evalr[1].value << 3) | $4;
X locctr += geninstr(findgen($1, ST_B03, cpuselect));
X }
X ;
Xgenline : KOC_ccop '(' dreg ')'
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_CC01, cpuselect|$3));
X }
X ;
Xgenline : KOC_ccop condition ',' expr
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $4);
X locctr += geninstr(findgen($1, ST_CC02, cpuselect|$2));
X }
X ;
Xgenline : KOC_ccop expr
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1,$2);
X locctr += geninstr(findgen($1, ST_CC03, cpuselect));
X }
X ;
Xgenline : KOC_ccop condition
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_CC04, cpuselect|$2));
X }
X ;
Xgenline : KOC_ccop
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_CC05, cpuselect));
X }
X ;
Xgenline : KOC_exop dreg ',' dreg
X {
X int selc = 0;
X
X genlocrec(currseg, labelloc);
X switch($2)
X {
X case DRAF:
X selc = EX1AF;
X break;
X case DRDE:
X selc = EX1DE;
X default:
X break;
X }
X
X switch($4)
X {
X case DRAF:
X selc |= EX2AF;
X break;
X case DRHL:
X selc |= EX2HL;
X default:
X break;
X }
X locctr += geninstr(findgen($1, ST_EX01, cpuselect|selc));
X }
X ;
Xgenline : KOC_exop '(' DREGSP ')' ',' dreg
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_EX02, cpuselect|$6));
X }
X ;
Xgenline : KOC_intmode expr
X {
X int selc = 0;
X
X genlocrec(currseg, labelloc);
X pevalexpr(1, $2);
X if(evalr[1].seg != SSG_ABS ||
X evalr[1].value < 0 ||
X evalr[1].value > 2)
X {
X fraerror("invalid interrupt mode");
X }
X else
X {
X selc = 1 << ((int) evalr[1].value);
X }
X locctr += geninstr(findgen($1, ST_IM01, cpuselect|selc));
X }
X ;
Xgenline : KOC_ioop '(' topexpr ')' ',' reg8
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $3);
X evalr[2].value = $6 << 3;
X locctr += geninstr(findgen($1, ST_IO01, cpuselect
X | ($6 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_ioop '(' REGC ')' ',' reg8
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $6 << 3;
X locctr += geninstr(findgen($1, ST_IO02, cpuselect));
X }
X ;
Xgenline : KOC_ioop reg8 ',' '(' topexpr ')'
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $2 << 3;
X pevalexpr(2, $5);
X locctr += geninstr(findgen($1, ST_IO03, cpuselect
X | ($2 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_ioop reg8 ',' '(' REGC ')'
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $2 << 3;
X locctr += geninstr(findgen($1, ST_IO04, cpuselect));
X }
X ;
Xgenline : KOC_ldop '(' dreg ')' ',' topexpr
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $6);
X locctr += geninstr(findgen($1, ST_LD01, cpuselect|$3));
X }
X ;
Xgenline : KOC_ldop '(' dreg ')' ',' reg8
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $6;
X locctr += geninstr(findgen($1, ST_LD02, cpuselect
X | $3 | ($6 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_ldop '(' topexpr ')' ',' dreg
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $3);
X locctr += geninstr(findgen($1, ST_LD03, cpuselect|$6));
X }
X ;
Xgenline : KOC_ldop '(' topexpr ')' ',' REGA
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $3);
X locctr += geninstr(findgen($1, ST_LD04, cpuselect));
X }
X ;
Xgenline : KOC_ldop dreg ',' '(' topexpr ')'
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $5);
X locctr += geninstr(findgen($1, ST_LD05, cpuselect|$2));
X }
X ;
Xgenline : KOC_ldop dreg ',' dreg
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_LD06, cpuselect|$4
X | ($2 == DRSP ? DRDESTSP : 0)));
X }
X ;
Xgenline : KOC_ldop dreg ',' topexpr
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $4);
X locctr += geninstr(findgen($1, ST_LD07, cpuselect|$2));
X }
X ;
Xgenline : KOC_ldop index ',' expr
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $2.exp);
X pevalexpr(2, $4);
X locctr += geninstr(findgen($1, ST_LD08, cpuselect|$2.indsel));
X }
X ;
Xgenline : KOC_ldop index ',' reg8
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1,$2.exp);
X evalr[2].value = $4;
X locctr += geninstr(findgen($1, ST_LD09, cpuselect|$2.indsel));
X }
X ;
Xgenline : KOC_ldop reg8 ',' '(' dreg ')'
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $2 << 3;
X locctr += geninstr(findgen($1, ST_LD10, cpuselect
X | $5 | ($2 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_ldop reg8 ',' topexpr
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $2 << 3;
X pevalexpr(2, $4);
X locctr += geninstr(findgen($1, ST_LD11, cpuselect));
X }
X ;
Xgenline : KOC_ldop reg8 ',' index
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $2 << 3;
X pevalexpr(2, $4.exp);
X locctr += geninstr(findgen($1, ST_LD12, cpuselect|$4.indsel));
X }
X ;
Xgenline : KOC_ldop reg8 ',' reg8
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = ($2 << 3 ) | $4;
X locctr += geninstr(findgen($1, ST_LD13, cpuselect));
X }
X ;
Xgenline : KOC_ldop reg8 ',' '(' topexpr ')'
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $5);
X locctr += geninstr(findgen($1, ST_LD14, cpuselect
X | ($2 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_ldop reg8 ',' specialr
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_LD15, cpuselect|$4
X | ($2 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_ldop specialr ',' REGA
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_LD16, cpuselect|$2));
X }
X ;
Xgenline : KOC_opcode
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_N01, cpuselect));
X }
X ;
Xgenline : KOC_opcode '(' DREGHL ')'
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_N02, cpuselect));
X }
X ;
Xgenline : KOC_opcode dreg
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_N04, cpuselect|$2));
X }
X ;
Xgenline : KOC_opcode dreg ',' dreg
X {
X int selc = 0;
X
X genlocrec(currseg, labelloc);
X switch($2)
X {
X case DRIX:
X selc = DRDESTIX;
X break;
X case DRIY:
X selc = DRDESTIY;
X break;
X case DRHL:
X selc = DRDESTHL;
X default:
X break;
X }
X locctr += geninstr(findgen($1, ST_N05, cpuselect
X | $4| selc));
X }
X ;
Xgenline : KOC_opcode topexpr
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $2);
X locctr += geninstr(findgen($1, ST_N06, cpuselect));
X }
X ;
Xgenline : KOC_opcode index
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $2.exp);
X locctr += geninstr(findgen($1, ST_N07, cpuselect|$2.indsel));
X }
X ;
Xgenline : KOC_opcode reg8
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $2;
X evalr[2].value = $2 << 3;
X locctr += geninstr(findgen($1, ST_N08, cpuselect));
X }
X ;
Xgenline : KOC_opcode reg8 ',' '(' DREGHL ')'
X {
X genlocrec(currseg, labelloc);
X locctr += geninstr(findgen($1, ST_N09, cpuselect
X | ($2 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_opcode reg8 ',' topexpr
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $4);
X locctr += geninstr(findgen($1, ST_N10, cpuselect
X | ($2 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_opcode reg8 ',' index
X {
X genlocrec(currseg, labelloc);
X pevalexpr(1, $4.exp);
X locctr += geninstr(findgen($1, ST_N11, cpuselect|$4.indsel
X | ($2 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_opcode reg8 ',' reg8
X {
X genlocrec(currseg, labelloc);
X evalr[1].value = $4;
X locctr += geninstr(findgen($1, ST_N12, cpuselect
X | ($2 == VALREGA ? REGISA : 0)));
X }
X ;
Xgenline : KOC_restart expr
X {
X int selc = 0;
X
X genlocrec(currseg, labelloc);
X pevalexpr(1, $2);
X if(evalr[1].seg != SSG_ABS)
X {
X fraerror("noncomputable expression for address");
X }
X else
X {
X selc = evalr[1].value;
X switch(selc)
X {
X case 0:
X case 0x8:
X case 0x10:
X case 0x18:
X case 0x20:
X case 0x28:
X case 0x30:
X case 0x38:
X break;
X default:
X fraerror("invalid value for reset expression");
X break;
X }
X }
X evalr[1].value &= 070;
X locctr += geninstr(findgen($1, ST_R01, cpuselect));
X }
X ;
X
Xreg8 : REGA
X | REGB
X | REGC
X | REGD
X | REGE
X | REGH
X | REGL
X ;
X
Xdreg : DREGAF
X | DREGBC
X | DREGDE
X | DREGHL
X | DREGIX
X | DREGIY
X | DREGSP
X ;
X
Xcondition : CONDZ
X | CONDNZ
X | CONDNC
X | CONDPE
X | CONDPO
X | CONDP
X | CONDM
X | REGC
X {
X $$ = CCSELC;
X }
X ;
X
Xspecialr : SREGI
X | SREGR
X ;
X
Xindex : '(' ixoriy '+' expr ')'
X {
X $$.exp = $4;
X $$.indsel = $2;
X }
X ;
X
Xixoriy : DREGIX
X | DREGIY
X ;
X
Xtopexpr : '+' expr %prec KEOP_MUN
X {
X $$ = $2;
X }
X | '-' expr %prec KEOP_MUN
X {
X $$ = exprnode(PCCASE_UN,$2,IFC_NEG,0,0L,
X SYMNULL);
X }
X | KEOP_NOT expr
X {
X $$ = exprnode(PCCASE_UN,$2,IFC_NOT,0,0L,
X SYMNULL);
X }
X | KEOP_HIGH expr
X {
X $$ = exprnode(PCCASE_UN,$2,IFC_HIGH,0,0L,
X SYMNULL);
X }
X | KEOP_LOW expr
X {
X $$ = exprnode(PCCASE_UN,$2,IFC_LOW,0,0L,
X SYMNULL);
X }
X | expr '*' expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_MUL,$3,0L,
X SYMNULL);
X }
X | expr '/' expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_DIV,$3,0L,
X SYMNULL);
X }
X | expr '+' expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_ADD,$3,0L,
X SYMNULL);
X }
X | expr '-' expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_SUB,$3,0L,
X SYMNULL);
X }
X | expr KEOP_MOD expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_MOD,$3,0L,
X SYMNULL);
X }
X | expr KEOP_SHL expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_SHL,$3,0L,
X SYMNULL);
X }
X | expr KEOP_SHR expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_SHR,$3,0L,
X SYMNULL);
X }
X | expr KEOP_GT expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_GT,$3,0L,
X SYMNULL);
X }
X | expr KEOP_GE expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_GE,$3,0L,
X SYMNULL);
X }
X | expr KEOP_LT expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_LT,$3,0L,
X SYMNULL);
X }
X | expr KEOP_LE expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_LE,$3,0L,
X SYMNULL);
X }
X | expr KEOP_NE expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_NE,$3,0L,
X SYMNULL);
X }
X | expr KEOP_EQ expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_EQ,$3,0L,
X SYMNULL);
X }
X | expr KEOP_AND expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_AND,$3,0L,
X SYMNULL);
X }
X | expr KEOP_OR expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_OR,$3,0L,
X SYMNULL);
X }
X | expr KEOP_XOR expr
X {
X $$ = exprnode(PCCASE_BIN,$1,IFC_XOR,$3,0L,
X SYMNULL);
X }
X | KEOP_DEFINED SYMBOL
X {
X $$ = exprnode(PCCASE_DEF,0,IGP_DEFINED,0,0L,$2);
X }
X | SYMBOL
X {
X $$ = exprnode(PCCASE_SYMB,0,IFC_SYMB,0,0L,$1);
X }
X | '*'
X {
X $$ = exprnode(PCCASE_PROGC,0,IFC_PROGCTR,0,
X labelloc, SYMNULL);
X }
X | CONSTANT
X {
X $$ = exprnode(PCCASE_CONS,0,IGP_CONSTANT,0,$1,
X SYMNULL);
X }
X | STRING
X {
X char *sourcestr = $1;
X long accval = 0;
X
X if(strlen($1) > 0)
X {
X accval = chtran(&sourcestr);
X if(*sourcestr != '\0')
X {
X accval = (accval << 8) +
X chtran(&sourcestr);
X }
X
X if( *sourcestr != '\0')
X {
X frawarn("string constant in expression more than 2 characters long");
X }
X }
X $$ = exprnode(PCCASE_CONS, 0, IGP_CONSTANT, 0,
X accval, SYMNULL);
X }
X ;
X
Xexpr : '(' topexpr ')'
X {
X $$ = $2;
X }
X | topexpr
X ;
X
X
X
X%%
X
Xlexintercept()
X/*
X description intercept the call to yylex (the lexical analyzer)
X and filter out all unnecessary tokens when skipping
X the input between a failed IF and its matching ENDI or
X ELSE
X globals fraifskip the enable flag
X*/
X{
X#undef yylex
X
X int rv;
X
X if(fraifskip)
X {
X for(;;)
X {
X
X switch(rv = yylex())
X
X {
X case 0:
X case KOC_END:
X case KOC_IF:
X case KOC_ELSE:
X case KOC_ENDI:
X case EOL:
X return rv;
X default:
X break;
X }
X }
X }
X else
X return yylex();
X#define yylex lexintercept
X}
X
X
Xsetreserved()
X{
X
X reservedsym("and", KEOP_AND, 0);
X reservedsym("defined", KEOP_DEFINED,0);
X reservedsym("eq", KEOP_EQ, 0);
X reservedsym("ge", KEOP_GE, 0);
X reservedsym("gt", KEOP_GT, 0);
X reservedsym("high", KEOP_HIGH, 0);
X reservedsym("le", KEOP_LE, 0);
X reservedsym("low", KEOP_LOW, 0);
X reservedsym("lt", KEOP_LT, 0);
X reservedsym("mod", KEOP_MOD, 0);
X reservedsym("ne", KEOP_NE, 0);
X reservedsym("not", KEOP_NOT, 0);
X reservedsym("or", KEOP_OR, 0);
X reservedsym("shl", KEOP_SHL, 0);
X reservedsym("shr", KEOP_SHR, 0);
X reservedsym("xor", KEOP_XOR, 0);
X reservedsym("AND", KEOP_AND, 0);
X reservedsym("DEFINED", KEOP_DEFINED,0);
X reservedsym("EQ", KEOP_EQ, 0);
X reservedsym("GE", KEOP_GE, 0);
X reservedsym("GT", KEOP_GT, 0);
X reservedsym("HIGH", KEOP_HIGH, 0);
X reservedsym("LE", KEOP_LE, 0);
X reservedsym("LOW", KEOP_LOW, 0);
X reservedsym("LT", KEOP_LT, 0);
X reservedsym("MOD", KEOP_MOD, 0);
X reservedsym("NE", KEOP_NE, 0);
X reservedsym("NOT", KEOP_NOT, 0);
X reservedsym("OR", KEOP_OR, 0);
X reservedsym("SHL", KEOP_SHL, 0);
X reservedsym("SHR", KEOP_SHR, 0);
X reservedsym("XOR", KEOP_XOR, 0);
X
X reservedsym("i",SREGI,SPECIALIR);
X reservedsym("r",SREGR,SPECIALRR);
X reservedsym("I",SREGI,SPECIALIR);
X reservedsym("R",SREGR,SPECIALRR);
X reservedsym("a",REGA,VALREGA);
X reservedsym("b",REGB,VALREGB);
X reservedsym("c",REGC,VALREGC);
X reservedsym("d",REGD,VALREGD);
X reservedsym("e",REGE,VALREGE);
X reservedsym("h",REGH,VALREGH);
X reservedsym("l",REGL,VALREGL);
X reservedsym("af",DREGAF,DRAF);
X reservedsym("bc",DREGBC,DRBC);
X reservedsym("de",DREGDE,DRDE);
X reservedsym("hl",DREGHL,DRHL);
X reservedsym("ix",DREGIX,DRIX);
X reservedsym("iy",DREGIY,DRIY);
X reservedsym("sp",DREGSP,DRSP);
X reservedsym("z",CONDZ,CCSELZ);
X reservedsym("nz",CONDNZ,CCSELNZ);
X reservedsym("nc",CONDNC,CCSELNC);
X reservedsym("pe",CONDPE,CCSELPE);
X reservedsym("po",CONDPO,CCSELPO);
X reservedsym("p",CONDP,CCSELP);
X reservedsym("m",CONDM,CCSELM);
X reservedsym("A",REGA,VALREGA);
X reservedsym("B",REGB,VALREGB);
X reservedsym("C",REGC,VALREGC);
X reservedsym("D",REGD,VALREGD);
X reservedsym("E",REGE,VALREGE);
X reservedsym("H",REGH,VALREGH);
X reservedsym("L",REGL,VALREGL);
X reservedsym("AF",DREGAF,DRAF);
X reservedsym("BC",DREGBC,DRBC);
X reservedsym("DE",DREGDE,DRDE);
X reservedsym("HL",DREGHL,DRHL);
X reservedsym("IX",DREGIX,DRIX);
X reservedsym("IY",DREGIY,DRIY);
X reservedsym("SP",DREGSP,DRSP);
X reservedsym("Z",CONDZ,CCSELZ);
X reservedsym("NZ",CONDNZ,CCSELNZ);
X reservedsym("NC",CONDNC,CCSELNC);
X reservedsym("PE",CONDPE,CCSELPE);
X reservedsym("PO",CONDPO,CCSELPO);
X reservedsym("P",CONDP,CCSELP);
X reservedsym("M",CONDM,CCSELM);
X
X}
X
Xcpumatch(str)
X char * str;
X{
X int msub;
X
X static struct
X {
X char * mtch;
X int cpuv;
X } matchtab[] =
X {
X {"180", CPU64180},
X {"z80", CPUZ80},
X {"Z80", CPUZ80},
X {"85", CPU8085},
X {"80", CPU8080},
X {"", 0}
X };
X
X for(msub = 0; matchtab[msub].cpuv != 0; msub++)
X {
X if(strcontains(str, matchtab[msub].mtch))
X {
X cpuselect = matchtab[msub].cpuv;
X return TRUE;
X }
X }
X
X return FALSE;
X}
X
Xstrcontains(s1, sm)
X char * s1, *sm;
X{
X int l1 = strlen(s1), lm = strlen(sm);
X
X for(; l1 >= lm; l1--, s1++)
X {
X if(strncmp(s1, sm, lm) == 0)
X {
X return TRUE;
X }
X }
X return FALSE;
X}
X
X/*
X description Opcode and Instruction generation tables
X usage Unix, framework crossassembler
X history September 25, 1987
X*/
X
X#define NUMOPCODE 104
X#define NUMSYNBLK 159
X#define NUMDIFFOP 276
X
Xint gnumopcode = NUMOPCODE;
X
Xint ophashlnk[NUMOPCODE];
X
Xstruct opsym optab[NUMOPCODE+1]
X = {
X {"invalid", KOC_opcode, 2, 0 },
X {"ADC", KOC_opcode, 5, 2 },
X {"ADD", KOC_opcode, 5, 7 },
X {"AND", KOC_opcode, 4, 12 },
X {"BIT", KOC_bit, 3, 16 },
X {"BYTE", KOC_BDEF, 0, 0 },
X {"CALL", KOC_ccop, 2, 19 },
X {"CCF", KOC_opcode, 1, 21 },
X {"CHARDEF", KOC_CHDEF, 0, 0 },
X {"CHARSET", KOC_CHSET, 0, 0 },
X {"CHARUSE", KOC_CHUSE, 0, 0 },
X {"CHD", KOC_CHDEF, 0, 0 },
X {"CP", KOC_opcode, 4, 22 },
X {"CPD", KOC_opcode, 1, 26 },
X {"CPDR", KOC_opcode, 1, 27 },
X {"CPI", KOC_opcode, 1, 28 },
X {"CPIR", KOC_opcode, 1, 29 },
X {"CPL", KOC_opcode, 1, 30 },
X {"CPU", KOC_CPU, 0, 0 },
X {"DAA", KOC_opcode, 1, 31 },
X {"DB", KOC_BDEF, 0, 0 },
X {"DEC", KOC_opcode, 4, 32 },
X {"DI", KOC_opcode, 1, 36 },
X {"DJNZ", KOC_opcode, 1, 37 },
X {"DW", KOC_WDEF, 0, 0 },
X {"EI", KOC_opcode, 1, 38 },
X {"ELSE", KOC_ELSE, 0, 0 },
X {"END", KOC_END, 0, 0 },
X {"ENDI", KOC_ENDI, 0, 0 },
X {"EQU", KOC_EQU, 0, 0 },
X {"EX", KOC_exop, 2, 39 },
X {"EXX", KOC_opcode, 1, 41 },
X {"FCB", KOC_BDEF, 0, 0 },
X {"FCC", KOC_SDEF, 0, 0 },
X {"FDB", KOC_WDEF, 0, 0 },
X {"HALT", KOC_opcode, 1, 42 },
X {"IF", KOC_IF, 0, 0 },
X {"IM", KOC_intmode, 1, 43 },
X {"IN0", KOC_ioop, 1, 44 },
X {"IN", KOC_ioop, 2, 45 },
X {"INC", KOC_opcode, 4, 47 },
X {"INCL", KOC_INCLUDE, 0, 0 },
X {"INCLUDE", KOC_INCLUDE, 0, 0 },
X {"IND", KOC_opcode, 1, 51 },
X {"INDR", KOC_opcode, 1, 52 },
X {"INI", KOC_opcode, 1, 53 },
X {"INIR", KOC_opcode, 1, 54 },
X {"JP", KOC_ccop, 3, 55 },
X {"JR", KOC_ccop, 2, 58 },
X {"LD", KOC_ldop, 16, 60 },
X {"LDD", KOC_opcode, 1, 76 },
X {"LDDR", KOC_opcode, 1, 77 },
X {"LDI", KOC_opcode, 1, 78 },
X {"LDIR", KOC_opcode, 1, 79 },
X {"MULT", KOC_opcode, 1, 80 },
X {"NEG", KOC_opcode, 1, 81 },
X {"NOP", KOC_opcode, 1, 82 },
X {"OR", KOC_opcode, 4, 83 },
X {"ORG", KOC_ORG, 0, 0 },
X {"OTDM", KOC_opcode, 1, 87 },
X {"OTDMR", KOC_opcode, 1, 88 },
X {"OTDR", KOC_opcode, 1, 89 },
X {"OTIM", KOC_opcode, 1, 90 },
X {"OTIMR", KOC_opcode, 1, 91 },
X {"OTIR", KOC_opcode, 1, 92 },
X {"OUT0", KOC_ioop, 1, 93 },
X {"OUT", KOC_ioop, 2, 94 },
X {"OUTD", KOC_opcode, 1, 96 },
X {"OUTI", KOC_opcode, 1, 97 },
X {"POP", KOC_opcode, 1, 98 },
X {"PUSH", KOC_opcode, 1, 99 },
X {"RES", KOC_bit, 3, 100 },
X {"RESERVE", KOC_RESM, 0, 0 },
X {"RET", KOC_ccop, 2, 103 },
X {"RETI", KOC_opcode, 1, 105 },
X {"RETN", KOC_opcode, 1, 106 },
X {"RIM", KOC_opcode, 1, 107 },
X {"RL", KOC_opcode, 3, 108 },
X {"RLA", KOC_opcode, 1, 111 },
X {"RLC", KOC_opcode, 3, 112 },
X {"RLCA", KOC_opcode, 1, 115 },
X {"RLD", KOC_opcode, 1, 116 },
X {"RMB", KOC_RESM, 0, 0 },
X {"RR", KOC_opcode, 3, 117 },
X {"RRA", KOC_opcode, 1, 120 },
X {"RRC", KOC_opcode, 3, 121 },
X {"RRCA", KOC_opcode, 1, 124 },
X {"RRD", KOC_opcode, 1, 125 },
X {"RST", KOC_restart, 1, 126 },
X {"SBC", KOC_opcode, 5, 127 },
X {"SCF", KOC_opcode, 1, 132 },
X {"SET", KOC_bit, 3, 133 },
X {"SETEQU", KOC_SET, 0, 0 },
X {"SIM", KOC_opcode, 1, 136 },
X {"SLA", KOC_opcode, 3, 137 },
X {"SLP", KOC_opcode, 1, 140 },
X {"SRA", KOC_opcode, 3, 141 },
X {"SRL", KOC_opcode, 3, 144 },
X {"STRING", KOC_SDEF, 0, 0 },
X {"SUB", KOC_opcode, 4, 147 },
X {"TST", KOC_opcode, 3, 151 },
X {"TSTIO", KOC_opcode, 1, 154 },
X {"WORD", KOC_WDEF, 0, 0 },
X {"XOR", KOC_opcode, 4, 155 },
X { "", 0, 0, 0 }};
X
Xstruct opsynt ostab[NUMSYNBLK+1]
X = {
X/* invalid 0 */ { 0, 1, 0 },
X/* invalid 1 */ { 0xffff, 1, 1 },
X/* ADC 2 */ { ST_N05, 4, 2 },
X/* ADC 3 */ { ST_N09, 1, 6 },
X/* ADC 4 */ { ST_N10, 1, 7 },
X/* ADC 5 */ { ST_N11, 2, 8 },
X/* ADC 6 */ { ST_N12, 1, 10 },
X/* ADD 7 */ { ST_N05, 12, 11 },
X/* ADD 8 */ { ST_N09, 1, 23 },
X/* ADD 9 */ { ST_N10, 1, 24 },
X/* ADD 10 */ { ST_N11, 2, 25 },
X/* ADD 11 */ { ST_N12, 1, 27 },
X/* AND 12 */ { ST_N02, 1, 28 },
X/* AND 13 */ { ST_N06, 1, 29 },
X/* AND 14 */ { ST_N07, 2, 30 },
X/* AND 15 */ { ST_N08, 1, 32 },
X/* BIT 16 */ { ST_B01, 1, 33 },
X/* BIT 17 */ { ST_B02, 2, 34 },
X/* BIT 18 */ { ST_B03, 1, 36 },
X/* CALL 19 */ { ST_CC02, 8, 37 },
X/* CALL 20 */ { ST_CC03, 1, 45 },
X/* CCF 21 */ { ST_N01, 1, 46 },
X/* CP 22 */ { ST_N02, 1, 47 },
X/* CP 23 */ { ST_N06, 1, 48 },
X/* CP 24 */ { ST_N07, 2, 49 },
X/* CP 25 */ { ST_N08, 1, 51 },
X/* CPD 26 */ { ST_N01, 1, 52 },
X/* CPDR 27 */ { ST_N01, 1, 53 },
X/* CPI 28 */ { ST_N01, 1, 54 },
X/* CPIR 29 */ { ST_N01, 1, 55 },
X/* CPL 30 */ { ST_N01, 1, 56 },
X/* DAA 31 */ { ST_N01, 1, 57 },
X/* DEC 32 */ { ST_N02, 1, 58 },
X/* DEC 33 */ { ST_N04, 6, 59 },
X/* DEC 34 */ { ST_N07, 2, 65 },
X/* DEC 35 */ { ST_N08, 1, 67 },
X/* DI 36 */ { ST_N01, 1, 68 },
X/* DJNZ 37 */ { ST_N06, 1, 69 },
X/* EI 38 */ { ST_N01, 1, 70 },
X/* EX 39 */ { ST_EX01, 2, 71 },
X/* EX 40 */ { ST_EX02, 3, 73 },
X/* EXX 41 */ { ST_N01, 1, 76 },
X/* HALT 42 */ { ST_N01, 1, 77 },
X/* IM 43 */ { ST_IM01, 3, 78 },
X/* IN0 44 */ { ST_IO03, 1, 81 },
X/* IN 45 */ { ST_IO03, 1, 82 },
X/* IN 46 */ { ST_IO04, 1, 83 },
X/* INC 47 */ { ST_N02, 1, 84 },
X/* INC 48 */ { ST_N04, 6, 85 },
X/* INC 49 */ { ST_N07, 2, 91 },
X/* INC 50 */ { ST_N08, 1, 93 },
X/* IND 51 */ { ST_N01, 1, 94 },
X/* INDR 52 */ { ST_N01, 1, 95 },
X/* INI 53 */ { ST_N01, 1, 96 },
X/* INIR 54 */ { ST_N01, 1, 97 },
X/* JP 55 */ { ST_CC01, 3, 98 },
X/* JP 56 */ { ST_CC02, 8, 101 },
X/* JP 57 */ { ST_CC03, 1, 109 },
X/* JR 58 */ { ST_CC02, 4, 110 },
X/* JR 59 */ { ST_CC03, 1, 114 },
X/* LD 60 */ { ST_LD01, 1, 115 },
X/* LD 61 */ { ST_LD02, 3, 116 },
X/* LD 62 */ { ST_LD03, 6, 119 },
X/* LD 63 */ { ST_LD04, 1, 125 },
X/* LD 64 */ { ST_LD05, 6, 126 },
X/* LD 65 */ { ST_LD06, 3, 132 },
X/* LD 66 */ { ST_LD07, 6, 135 },
X/* LD 67 */ { ST_LD08, 2, 141 },
X/* LD 68 */ { ST_LD09, 2, 143 },
X/* LD 69 */ { ST_LD10, 3, 145 },
X/* LD 70 */ { ST_LD11, 1, 148 },
X/* LD 71 */ { ST_LD12, 2, 149 },
X/* LD 72 */ { ST_LD13, 1, 151 },
X/* LD 73 */ { ST_LD14, 1, 152 },
X/* LD 74 */ { ST_LD15, 2, 153 },
X/* LD 75 */ { ST_LD16, 2, 155 },
X/* LDD 76 */ { ST_N01, 1, 157 },
X/* LDDR 77 */ { ST_N01, 1, 158 },
X/* LDI 78 */ { ST_N01, 1, 159 },
X/* LDIR 79 */ { ST_N01, 1, 160 },
X/* MULT 80 */ { ST_N04, 4, 161 },
X/* NEG 81 */ { ST_N01, 1, 165 },
X/* NOP 82 */ { ST_N01, 1, 166 },
X/* OR 83 */ { ST_N02, 1, 167 },
X/* OR 84 */ { ST_N06, 1, 168 },
X/* OR 85 */ { ST_N07, 2, 169 },
X/* OR 86 */ { ST_N08, 1, 171 },
X/* OTDM 87 */ { ST_N01, 1, 172 },
X/* OTDMR 88 */ { ST_N01, 1, 173 },
X/* OTDR 89 */ { ST_N01, 1, 174 },
X/* OTIM 90 */ { ST_N01, 1, 175 },
X/* OTIMR 91 */ { ST_N01, 1, 176 },
X/* OTIR 92 */ { ST_N01, 1, 177 },
X/* OUT0 93 */ { ST_IO01, 1, 178 },
X/* OUT 94 */ { ST_IO01, 1, 179 },
X/* OUT 95 */ { ST_IO02, 1, 180 },
X/* OUTD 96 */ { ST_N01, 1, 181 },
X/* OUTI 97 */ { ST_N01, 1, 182 },
X/* POP 98 */ { ST_N04, 6, 183 },
X/* PUSH 99 */ { ST_N04, 6, 189 },
X/* RES 100 */ { ST_B01, 1, 195 },
X/* RES 101 */ { ST_B02, 2, 196 },
X/* RES 102 */ { ST_B03, 1, 198 },
X/* RET 103 */ { ST_CC04, 8, 199 },
X/* RET 104 */ { ST_CC05, 1, 207 },
X/* RETI 105 */ { ST_N01, 1, 208 },
X/* RETN 106 */ { ST_N01, 1, 209 },
X/* RIM 107 */ { ST_N01, 1, 210 },
X/* RL 108 */ { ST_N02, 1, 211 },
X/* RL 109 */ { ST_N07, 2, 212 },
X/* RL 110 */ { ST_N08, 1, 214 },
X/* RLA 111 */ { ST_N01, 1, 215 },
X/* RLC 112 */ { ST_N02, 1, 216 },
X/* RLC 113 */ { ST_N07, 2, 217 },
X/* RLC 114 */ { ST_N08, 1, 219 },
X/* RLCA 115 */ { ST_N01, 1, 220 },
X/* RLD 116 */ { ST_N01, 1, 221 },
X/* RR 117 */ { ST_N02, 1, 222 },
X/* RR 118 */ { ST_N07, 2, 223 },
X/* RR 119 */ { ST_N08, 1, 225 },
X/* RRA 120 */ { ST_N01, 1, 226 },
X/* RRC 121 */ { ST_N02, 1, 227 },
X/* RRC 122 */ { ST_N07, 2, 228 },
X/* RRC 123 */ { ST_N08, 1, 230 },
X/* RRCA 124 */ { ST_N01, 1, 231 },
X/* RRD 125 */ { ST_N01, 1, 232 },
X/* RST 126 */ { ST_R01, 1, 233 },
X/* SBC 127 */ { ST_N05, 4, 234 },
X/* SBC 128 */ { ST_N09, 1, 238 },
X/* SBC 129 */ { ST_N10, 1, 239 },
X/* SBC 130 */ { ST_N11, 2, 240 },
X/* SBC 131 */ { ST_N12, 1, 242 },
X/* SCF 132 */ { ST_N01, 1, 243 },
X/* SET 133 */ { ST_B01, 1, 244 },
X/* SET 134 */ { ST_B02, 2, 245 },
X/* SET 135 */ { ST_B03, 1, 247 },
X/* SIM 136 */ { ST_N01, 1, 248 },
X/* SLA 137 */ { ST_N02, 1, 249 },
X/* SLA 138 */ { ST_N07, 2, 250 },
X/* SLA 139 */ { ST_N08, 1, 252 },
X/* SLP 140 */ { ST_N01, 1, 253 },
X/* SRA 141 */ { ST_N02, 1, 254 },
X/* SRA 142 */ { ST_N07, 2, 255 },
X/* SRA 143 */ { ST_N08, 1, 257 },
X/* SRL 144 */ { ST_N02, 1, 258 },
X/* SRL 145 */ { ST_N07, 2, 259 },
X/* SRL 146 */ { ST_N08, 1, 261 },
X/* SUB 147 */ { ST_N02, 1, 262 },
X/* SUB 148 */ { ST_N06, 1, 263 },
X/* SUB 149 */ { ST_N07, 2, 264 },
X/* SUB 150 */ { ST_N08, 1, 266 },
X/* TST 151 */ { ST_N02, 1, 267 },
X/* TST 152 */ { ST_N06, 1, 268 },
X/* TST 153 */ { ST_N08, 1, 269 },
X/* TSTIO 154 */ { ST_N06, 1, 270 },
X/* XOR 155 */ { ST_N02, 1, 271 },
X/* XOR 156 */ { ST_N06, 1, 272 },
X/* XOR 157 */ { ST_N07, 2, 273 },
X/* XOR 158 */ { ST_N08, 1, 275 },
X { 0, 0, 0 } };
X
Xstruct igel igtab[NUMDIFFOP+1]
X = {
X/* invalid 0 */ { 0 , 0,
X "[Xnullentry" },
X/* invalid 1 */ { 0 , 0,
X "[Xinvalid opcode" },
X/* ADC 2 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTHL|DRBC,
X "ed;4a;" },
X/* ADC 3 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTHL|DRDE,
X "ed;5a;" },
X/* ADC 4 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTHL|DRHL,
X "ed;6a;" },
X/* ADC 5 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTHL|DRSP,
X "ed;7a;" },
X/* ADC 6 */ { REGISA , REGISA,
X "8e;" },
X/* ADC 7 */ { REGISA , REGISA,
X "ce;[1=];" },
X/* ADC 8 */ { REGISA|TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX|REGISA,
X "dd;8e;[1=]r" },
X/* ADC 9 */ { REGISA|TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY|REGISA,
X "fd;8e;[1=]r" },
X/* ADC 10 */ { REGISA|0 , 0|REGISA,
X "88.[1#]|;" },
X/* ADD 11 */ { DRDESTMASK|DRMASK , DRDESTHL|DRBC,
X "09;" },
X/* ADD 12 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTIX|DRBC,
X "dd;09;" },
X/* ADD 13 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTIY|DRBC,
X "fd;09;" },
X/* ADD 14 */ { DRDESTMASK|DRMASK , DRDESTHL|DRDE,
X "19;" },
X/* ADD 15 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTIX|DRDE,
X "dd;19;" },
X/* ADD 16 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTIY|DRDE,
X "fd;19;" },
X/* ADD 17 */ { DRDESTMASK|DRMASK , DRDESTHL|DRHL,
X "29;" },
X/* ADD 18 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTIX|DRIX,
X "dd;29;" },
X/* ADD 19 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTIY|DRIY,
X "fd;29;" },
X/* ADD 20 */ { DRDESTMASK|DRMASK , DRDESTHL|DRSP,
X "39;" },
X/* ADD 21 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTIX|DRSP,
X "dd;39;" },
X/* ADD 22 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTIY|DRSP,
X "fd;39;" },
X/* ADD 23 */ { REGISA , REGISA,
X "86;" },
X/* ADD 24 */ { REGISA , REGISA,
X "c6;[1=];" },
X/* ADD 25 */ { REGISA|TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX|REGISA,
X "dd;86;[1=]r" },
X/* ADD 26 */ { REGISA|TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY|REGISA,
X "fd;86;[1=]r" },
X/* ADD 27 */ { REGISA|0 , 0|REGISA,
X "80.[1#]|;" },
X/* AND 28 */ { 0 , 0,
X "a6;" },
X/* AND 29 */ { 0 , 0,
X "e6;[1=];" },
X/* AND 30 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;a6;[1=]r" },
X/* AND 31 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;a6;[1=]r" },
X/* AND 32 */ { 0 , 0,
X "a0.[1#]|;" },
X/* BIT 33 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;[1#].46|;" },
X/* BIT 34 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;cb;[2=]r46.[1#]|;" },
X/* BIT 35 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;cb;[2=]r46.[1#]|;" },
X/* BIT 36 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;[1#].40|;" },
X/* CALL 37 */ { CCSELMASK , CCSELNZ,
X "c4;[1=]y" },
X/* CALL 38 */ { CCSELMASK , CCSELZ,
X "cc;[1=]y" },
X/* CALL 39 */ { CCSELMASK , CCSELNC,
X "d4;[1=]y" },
X/* CALL 40 */ { CCSELMASK , CCSELC,
X "dc;[1=]y" },
X/* CALL 41 */ { CCSELMASK , CCSELPO,
X "e4;[1=]y" },
X/* CALL 42 */ { CCSELMASK , CCSELPE,
X "ec;[1=]y" },
X/* CALL 43 */ { CCSELMASK , CCSELP,
X "f4;[1=]y" },
X/* CALL 44 */ { CCSELMASK , CCSELM,
X "fc;[1=]y" },
X/* CALL 45 */ { 0 , 0,
X "cd;[1=]y" },
X/* CCF 46 */ { 0 , 0,
X "3f;" },
X/* CP 47 */ { 0 , 0,
X "be;" },
X/* CP 48 */ { 0 , 0,
X "fe;[1=];" },
X/* CP 49 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;be;[1=]r" },
X/* CP 50 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;be;[1=]r" },
X/* CP 51 */ { 0 , 0,
X "b8.[1#]|;" },
X/* CPD 52 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;a9;" },
X/* CPDR 53 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;b9;" },
X/* CPI 54 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;a1;" },
X/* CPIR 55 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;b1;" },
X/* CPL 56 */ { 0 , 0,
X "2f;" },
X/* DAA 57 */ { 0 , 0,
X "27;" },
X/* DEC 58 */ { 0 , 0,
X "35;" },
X/* DEC 59 */ { DRMASK , DRBC,
X "0b;" },
X/* DEC 60 */ { DRMASK , DRDE,
X "1b;" },
X/* DEC 61 */ { DRMASK , DRHL,
X "2b;" },
X/* DEC 62 */ { DRMASK , DRSP,
X "3b;" },
X/* DEC 63 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;2b;" },
X/* DEC 64 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;2b;" },
X/* DEC 65 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;35;[1=]r" },
X/* DEC 66 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;35;[1=]r" },
X/* DEC 67 */ { 0 , 0,
X "05.[2#]|;" },
X/* DI 68 */ { 0 , 0,
X "f3;" },
X/* DJNZ 69 */ { 0 , 0,
X "10;[1=].P.2+-r" },
X/* EI 70 */ { 0 , 0,
X "fb;" },
X/* EX 71 */ { EXMASK , EX1DE|EX2HL,
X "eb;" },
X/* EX 72 */ { TSZ80PLUS|EXMASK , TSZ80PLUS|EX1AF|EX2AF,
X "08;" },
X/* EX 73 */ { DRMASK , DRHL,
X "e3;" },
X/* EX 74 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;e3;" },
X/* EX 75 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;e3;" },
X/* EXX 76 */ { TSZ80PLUS , TSZ80PLUS,
X "d9;" },
X/* HALT 77 */ { 0 , 0,
X "76;" },
X/* IM 78 */ { TSZ80PLUS|INTSETMASK , TSZ80PLUS|INTSETMODE0,
X "ed;46;" },
X/* IM 79 */ { TSZ80PLUS|INTSETMASK , TSZ80PLUS|INTSETMODE1,
X "ed;56;" },
X/* IM 80 */ { TSZ80PLUS|INTSETMASK , TSZ80PLUS|INTSETMODE2,
X "ed;5e;" },
X/* IN0 81 */ { TS64180 , TS64180,
X "ed;00.[1#]|;[2=];" },
X/* IN 82 */ { REGISA , REGISA,
X "db;[2=];" },
X/* IN 83 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;40.[1#]|;" },
X/* INC 84 */ { 0 , 0,
X "34;" },
X/* INC 85 */ { DRMASK , DRBC,
X "03;" },
X/* INC 86 */ { DRMASK , DRDE,
X "13;" },
X/* INC 87 */ { DRMASK , DRHL,
X "23;" },
X/* INC 88 */ { DRMASK , DRSP,
X "33;" },
X/* INC 89 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;23;" },
X/* INC 90 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;23;" },
X/* INC 91 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;34;[1=]r" },
X/* INC 92 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;34;[1=]r" },
X/* INC 93 */ { 0 , 0,
X "04.[2#]|;" },
X/* IND 94 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;aa;" },
X/* INDR 95 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;ba;" },
X/* INI 96 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;a2;" },
X/* INIR 97 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;b2;" },
X/* JP 98 */ { DRMASK , DRHL,
X "e9;" },
X/* JP 99 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;e9;" },
X/* JP 100 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;e9;" },
X/* JP 101 */ { CCSELMASK , CCSELNZ,
X "c2;[1=]y" },
X/* JP 102 */ { CCSELMASK , CCSELZ,
X "ca;[1=]y" },
X/* JP 103 */ { CCSELMASK , CCSELNC,
X "d2;[1=]y" },
X/* JP 104 */ { CCSELMASK , CCSELC,
X "da;[1=]y" },
X/* JP 105 */ { CCSELMASK , CCSELPO,
X "e2;[1=]y" },
X/* JP 106 */ { CCSELMASK , CCSELPE,
X "ea;[1=]y" },
X/* JP 107 */ { CCSELMASK , CCSELP,
X "f2;[1=]y" },
X/* JP 108 */ { CCSELMASK , CCSELM,
X "fa;[1=]y" },
X/* JP 109 */ { 0 , 0,
X "c3;[1=]y" },
X/* JR 110 */ { TSZ80PLUS|CCSELMASK , CCSELNZ|TSZ80PLUS,
X "20;[1=].P.2+-r" },
X/* JR 111 */ { TSZ80PLUS|CCSELMASK , CCSELZ|TSZ80PLUS,
X "28;[1=].P.2+-r" },
X/* JR 112 */ { TSZ80PLUS|CCSELMASK , CCSELNC|TSZ80PLUS,
X "30;[1=].P.2+-r" },
X/* JR 113 */ { TSZ80PLUS|CCSELMASK , CCSELC|TSZ80PLUS,
X "38;[1=].P.2+-r" },
X/* JR 114 */ { TSZ80PLUS , TSZ80PLUS,
X "18;[1=].P.2+-r" },
X/* LD 115 */ { DRMASK , DRHL,
X "36;[1=];" },
X/* LD 116 */ { DRMASK , DRHL,
X "70.[1#]|;" },
X/* LD 117 */ { DRMASK|REGISA , DRBC|REGISA,
X "02;" },
X/* LD 118 */ { DRMASK|REGISA , DRDE|REGISA,
X "12;" },
X/* LD 119 */ { DRMASK , DRHL,
X "22;[1=]y" },
X/* LD 120 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;22;[1=]y" },
X/* LD 121 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;22;[1=]y" },
X/* LD 122 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRBC,
X "ed;43;[1=]y" },
X/* LD 123 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRDE,
X "ed;53;[1=]y" },
X/* LD 124 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRSP,
X "ed;73;[1=]y" },
X/* LD 125 */ { 0 , 0,
X "32;[1=]y" },
X/* LD 126 */ { DRMASK , DRHL,
X "2a;[1=]y" },
X/* LD 127 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;2a;[1=]y" },
X/* LD 128 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;2a;[1=]y" },
X/* LD 129 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRBC,
X "ed;4b;[1=]y" },
X/* LD 130 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRDE,
X "ed;5b;[1=]y" },
X/* LD 131 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRSP,
X "ed;7b;[1=]y" },
X/* LD 132 */ { DRDESTMASK|TSZ80PLUS|DRMASK , TSZ80PLUS|DRHL|DRDESTSP,
X "f9;" },
X/* LD 133 */ { DRDESTMASK|TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX|DRDESTSP,
X "dd;f9;" },
X/* LD 134 */ { DRDESTMASK|TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY|DRDESTSP,
X "fd;f9;" },
X/* LD 135 */ { DRMASK , DRHL,
X "21;[1=]y" },
X/* LD 136 */ { DRMASK , DRBC,
X "01;[1=]y" },
X/* LD 137 */ { DRMASK , DRDE,
X "11;[1=]y" },
X/* LD 138 */ { DRMASK , DRSP,
X "31;[1=]y" },
X/* LD 139 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;21;[1=]y" },
X/* LD 140 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;21;[1=]y" },
X/* LD 141 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;36;[1=]r[2=];" },
X/* LD 142 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;36;[1=]r[2=];" },
X/* LD 143 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;70.[2#]|;[1=]r" },
X/* LD 144 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;70.[2#]|;[1=]r" },
X/* LD 145 */ { DRMASK , DRHL,
X "46.[1#]|;" },
X/* LD 146 */ { DRMASK|REGISA , DRBC|REGISA,
X "0a;" },
X/* LD 147 */ { DRMASK|REGISA , DRDE|REGISA,
X "1a;" },
X/* LD 148 */ { 0 , 0,
X "06.[1#]|;[2=];" },
X/* LD 149 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;46.[1#]|;[2=]r" },
X/* LD 150 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;46.[1#]|;[2=]r" },
X/* LD 151 */ { 0 , 0,
X "40.[1#]|;" },
X/* LD 152 */ { REGISA , REGISA,
X "3a;[1=]y" },
X/* LD 153 */ { REGISA|TSZ80PLUS|SPECIALRMASK , TSZ80PLUS|SPECIALIR|REGISA,
X "ed;57;" },
X/* LD 154 */ { REGISA|TSZ80PLUS|SPECIALRMASK , TSZ80PLUS|SPECIALRR|REGISA,
X "ed;5f;" },
X/* LD 155 */ { TSZ80PLUS|SPECIALRMASK , TSZ80PLUS|SPECIALIR,
X "ed;47;" },
X/* LD 156 */ { TSZ80PLUS|SPECIALRMASK , TSZ80PLUS|SPECIALRR,
X "ed;4f;" },
X/* LDD 157 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;a8;" },
X/* LDDR 158 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;b8;" },
X/* LDI 159 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;a0;" },
X/* LDIR 160 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;b0;" },
X/* MULT 161 */ { TS64180|DRMASK , TS64180|DRBC,
X "ed;4c;" },
X/* MULT 162 */ { TS64180|DRMASK , TS64180|DRDE,
X "ed;5c;" },
X/* MULT 163 */ { TS64180|DRMASK , TS64180|DRHL,
X "ed;6c;" },
X/* MULT 164 */ { TS64180|DRMASK , TS64180|DRSP,
X "ed;7c;" },
X/* NEG 165 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;44;" },
X/* NOP 166 */ { 0 , 0,
X "00;" },
X/* OR 167 */ { 0 , 0,
X "b6;" },
X/* OR 168 */ { 0 , 0,
X "f6;[1=];" },
X/* OR 169 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;b6;[1=]r" },
X/* OR 170 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;b6;[1=]r" },
X/* OR 171 */ { 0 , 0,
X "b0.[1#]|;" },
X/* OTDM 172 */ { TS64180 , TS64180,
X "ed;8b;" },
X/* OTDMR 173 */ { TS64180 , TS64180,
X "ed;9b;" },
X/* OTDR 174 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;bb;" },
X/* OTIM 175 */ { TS64180 , TS64180,
X "ed;83;" },
X/* OTIMR 176 */ { TS64180 , TS64180,
X "ed;93;" },
X/* OTIR 177 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;b3;" },
X/* OUT0 178 */ { TS64180 , TS64180,
X "ed;01.[2#]|;[1=];" },
X/* OUT 179 */ { REGISA , REGISA,
X "d3;[1=];" },
X/* OUT 180 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;41.[1#]|;" },
X/* OUTD 181 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;ab;" },
X/* OUTI 182 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;a3;" },
X/* POP 183 */ { DRMASK , DRBC,
X "c1;" },
X/* POP 184 */ { DRMASK , DRDE,
X "d1;" },
X/* POP 185 */ { DRMASK , DRHL,
X "e1;" },
X/* POP 186 */ { DRMASK , DRAF,
X "f1;" },
X/* POP 187 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;e1;" },
X/* POP 188 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;e1;" },
X/* PUSH 189 */ { DRMASK , DRBC,
X "c5;" },
X/* PUSH 190 */ { DRMASK , DRDE,
X "d5;" },
X/* PUSH 191 */ { DRMASK , DRHL,
X "e5;" },
X/* PUSH 192 */ { DRMASK , DRAF,
X "f5;" },
X/* PUSH 193 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;e5;" },
X/* PUSH 194 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;e5;" },
X/* RES 195 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;[1#].86|;" },
X/* RES 196 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;cb;[2=]r86.[1#]|;" },
X/* RES 197 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;cb;[2=]r86.[1#]|;" },
X/* RES 198 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;[1#].80|;" },
X/* RET 199 */ { CCSELMASK , CCSELNZ,
X "c0;" },
X/* RET 200 */ { CCSELMASK , CCSELZ,
X "c8;" },
X/* RET 201 */ { CCSELMASK , CCSELNC,
X "d0;" },
X/* RET 202 */ { CCSELMASK , CCSELC,
X "d8;" },
X/* RET 203 */ { CCSELMASK , CCSELPO,
X "e0;" },
X/* RET 204 */ { CCSELMASK , CCSELPE,
X "e8;" },
X/* RET 205 */ { CCSELMASK , CCSELP,
X "f0;" },
X/* RET 206 */ { CCSELMASK , CCSELM,
X "f8;" },
X/* RET 207 */ { 0 , 0,
X "c9;" },
X/* RETI 208 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;4d;" },
X/* RETN 209 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;45;" },
X/* RIM 210 */ { CPUMASK , CPU8085,
X "20;" },
X/* RL 211 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;16;" },
X/* RL 212 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;cb;[1=]r16;" },
X/* RL 213 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;cb;[1=]r16;" },
X/* RL 214 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;10.[1#]|;" },
X/* RLA 215 */ { 0 , 0,
X "17;" },
X/* RLC 216 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;06;" },
X/* RLC 217 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;cb;[1=]r06;" },
X/* RLC 218 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;cb;[1=]r06;" },
X/* RLC 219 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;00.[1#]|;" },
X/* RLCA 220 */ { 0 , 0,
X "07;" },
X/* RLD 221 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;6f;" },
X/* RR 222 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;1e;" },
X/* RR 223 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;cb;[1=]r1e;" },
X/* RR 224 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;cb;[1=]r1e;" },
X/* RR 225 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;18.[1#]|;" },
X/* RRA 226 */ { 0 , 0,
X "1f;" },
X/* RRC 227 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;0e;" },
X/* RRC 228 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;cb;[1=]r0e;" },
X/* RRC 229 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;cb;[1=]r0e;" },
X/* RRC 230 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;08.[1#]|;" },
X/* RRCA 231 */ { 0 , 0,
X "0f;" },
X/* RRD 232 */ { TSZ80PLUS , TSZ80PLUS,
X "ed;67;" },
X/* RST 233 */ { 0 , 0,
X "c7.[1#]|;" },
X/* SBC 234 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTHL|DRBC,
X "ed;42;" },
X/* SBC 235 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTHL|DRDE,
X "ed;52;" },
X/* SBC 236 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTHL|DRHL,
X "ed;62;" },
X/* SBC 237 */ { TSZ80PLUS|DRDESTMASK|DRMASK , TSZ80PLUS|DRDESTHL|DRSP,
X "ed;72;" },
X/* SBC 238 */ { REGISA , REGISA,
X "9e;" },
X/* SBC 239 */ { REGISA , REGISA,
X "de;[1=];" },
X/* SBC 240 */ { REGISA|TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX|REGISA,
X "dd;9e;[1=]r" },
X/* SBC 241 */ { REGISA|TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY|REGISA,
X "fd;9e;[1=]r" },
X/* SBC 242 */ { REGISA|0 , 0|REGISA,
X "98.[1#]|;" },
X/* SCF 243 */ { 0 , 0,
X "37;" },
X/* SET 244 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;[1#].c6|;" },
X/* SET 245 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIX,
X "dd;cb;[2=]rc6.[1#]|;" },
X/* SET 246 */ { TSZ80PLUS|DRMASK , TSZ80PLUS|DRIY,
X "fd;cb;[2=]rc6.[1#]|;" },
X/* SET 247 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;[1#].c0|;" },
X/* SIM 248 */ { CPUMASK , CPU8085,
X "30;" },
X/* SLA 249 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;26;" },
X/* SLA 250 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;cb;[1=]r26;" },
X/* SLA 251 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;cb;[1=]r26;" },
X/* SLA 252 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;20.[1#]|;" },
X/* SLP 253 */ { TS64180 , TS64180,
X "ed;76;" },
X/* SRA 254 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;2e;" },
X/* SRA 255 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;cb;[1=]r2e;" },
X/* SRA 256 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;cb;[1=]r2e;" },
X/* SRA 257 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;28.[1#]|;" },
X/* SRL 258 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;3e;" },
X/* SRL 259 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;cb;[1=]r3e;" },
X/* SRL 260 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;cb;[1=]r3e;" },
X/* SRL 261 */ { TSZ80PLUS , TSZ80PLUS,
X "cb;38.[1#]|;" },
X/* SUB 262 */ { 0 , 0,
X "96;" },
X/* SUB 263 */ { 0 , 0,
X "d6;[1=];" },
X/* SUB 264 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;96;[1=]r" },
X/* SUB 265 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;96;[1=]r" },
X/* SUB 266 */ { 0 , 0,
X "90.[1#]|;" },
X/* TST 267 */ { TS64180 , TS64180,
X "ed;34;" },
X/* TST 268 */ { TS64180 , TS64180,
X "ed;64;[1=];" },
X/* TST 269 */ { TS64180 , TS64180,
X "ed;04.[2#]|;" },
X/* TSTIO 270 */ { TS64180 , TS64180,
X "ed;74;[1=];" },
X/* XOR 271 */ { 0 , 0,
X "ae;" },
X/* XOR 272 */ { 0 , 0,
X "ee;[1=];" },
X/* XOR 273 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIX,
X "dd;ae;[1=]r" },
X/* XOR 274 */ { DRMASK|TSZ80PLUS , TSZ80PLUS|DRIY,
X "fd;ae;[1=]r" },
X/* XOR 275 */ { 0 , 0,
X "a8.[1#]|;" },
X { 0,0,""} };
X/* end fraptabdef.c */
SHAR_EOF
true || echo 'restore of asz80.y failed'
fi
exit 0
