home
***
CD-ROM
|
disk
|
FTP
|
other
***
search
/
Audio 4.94 - Over 11,000 Files
/
audio-11000.iso
/
msdos
/
sndbords
/
proaudio
/
pas_sdk1
/
pas-sdk1.arj
/
PAS
/
TECHNOTE.DOC
< prev
Wrap
Text File
|
1992-07-21
|
4KB
|
96 lines
----=====================================================----
----====< This file contains additional programming >====----
----====< information for the Pro Audio Spectrum. >====----
----=====================================================----
Programming PCM stuff... (For the Original Pro Audio Spectrum)
A few considerations when programming the 8253 timer chip.
1. When programming timer 0 (sample rate timer), and
timer 1 (sample buffer count), remember to first
program the shadowed timer control register (138Bh)
to set up the timer mode. This was not well documented
in the early versions of the developers kit manual.
2. A speed related problem has been reported when
programming the 8253 timers. A period of time must
elapse between programming the shadowed timer control
register, and the actual timers. This should be
minimally 2 micro seconds. The best approach is to
perform an OUT instruction, then a couple IN
instructions. The I/O instructions will slow all
processors down to the 8 mhz rate; thereby, forcing
proper timing on all AT class machines.
3. A special note about the sample buffer counter. Normal
PCM record and playback uses mode 2 of the 8253 timer.
This mode only accepts values from 2 through ffff+1 (or
zero for 64k). A value of 1 will not generate the
expected end of buffer interrupt.
4. The description of the sample rate and sample buffer
mask bit in the developers manual, is not clear. These
bits are the enable gates that allow the timers to run.
These bits are set to enable the timers, not to disable
them.
New programming considerations for support the Pro Audio
Spectrum products based upon the MV101 ASIC.
Changes to the 8253 timer chip.
The MV101 ASIC emulates the 8253 timer chip, with
a couple changes. Timer 0 is only an 8 bit value.
When programming the timer for 16 bits, the high
order byte will be ignored.
Timer 1 functionality has been modified. The timer
works the same for 8 and 16 bit PCM on 8 bit DMA
channels, but changes slightly for the 16 bit DMA
channels. The count needs to be divided by 2 when
programming the timer for use on a 16 bit channel.
Single Shot DMA PCM transfers.
When performing DMA transfers, and NOT using the
auto-initialize DMA mode, one special step should
be performed at IRQ time. Upon receiving a Sample
Buffer Count interrupt (buffer complete IRQ), turn
off the PCMEnable bit in the cross channel register.
Once the DMA is programmned for the next block,
and timer 1 reprogrammed for the new block length,
the PCMEnable bit can be turned back on.
DMA & IRQ channel support.
The Pro Audio spectrum product line, based upon the
MV101 ASIC, supports the high order DMA and IRQs
of the AT class machines. Please add support for
these channels. Example code can be found in
MVSOUND.ASM in \PAS\SUBS\MVSOUND.
Board I/O relocation.
The MV1010 ASIC allows the Pro Audio to be relocated
to alternate base I/O addresses. For example, the
card can be moved, from 388 to 384. This affects all
native Pro Audio addresses, such as the filter, pcm,
interrupt, fm, and MIDI addresses. Use the function,
"mvGetHWVersion" to determine the current I/O address.
For coding examples, checkout MVSOUND.ASM in the
subdirectory, \PAS\SUBS\MVSOUND. This code calls
mvGetHWVersion, then uses a special memory variable,
"_MVTranslateCode" to adjust the original address.
Stereo 2OP FM Synthesis.
The new OPL3 4OP FM chip does not exactly emulate
two 2OP FM chips. Two programs, PAN2OP.C and PHASE.C,
located in \PAS\SUBS\FM, show how to perform stereo
2OP on either hardware platforms.