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Text File  |  1995-05-05  |  4KB  |  64 lines
  1. 5.2.6　システムコントローラの制御方法
  2.  
  3. 表5.2.6.1にシステムコントローラの制御ビットを示します。
  4.  
  5. 　　　　　表5.2.6.1(a) システムコントローラの制御ビット(MCUモード)
  6.  
  7. ｱﾄﾞﾚｽ   ﾋﾞｯﾄ  名称　　　        機　能              1　　0　　SR　R/W　注釈
  8. 00FF00   D7   BSMD1     ﾊﾟｽﾓｰﾄﾞ(CPUﾓｰﾄﾞ)                      0   R/W
  9. (MCU)                    BSMD1 BSMD0     ﾓｰﾄﾞ
  10.                            1     1    512K(ﾏｷｼﾏﾑ)
  11.          D6   BSMD0        1     0    512K(ﾐﾆﾏﾑ)              0   R/W
  12.                            0     1    64K
  13.                            0     0    ｼﾝｸﾞﾙﾁｯﾌﾟ
  14.          D5   CEMD1     ﾁｯﾌﾟｲﾈｰﾌﾞﾙﾓｰﾄﾞ                        1   R/W  64Kﾊﾟｽﾓｰﾄﾞ
  15.                          CEMD1 CEMD0     ﾓｰﾄﾞ                          のみ
  16.                            1     1    64K(CE0)
  17.          D4   CEMD0        1     0    32K(CE0,CE1)            1   R/W
  18.                            0     1    16K(CE1-CE3)
  19.                            0     0     8K(CE0-CE3)
  20.          D3   CE3　　   CE3(R33)                   CE3　CE3   0   R/W  ｼﾝｸﾞﾙﾁｯﾌﾟ
  21.                                  CE信号出力ｲﾈｰﾌﾞﾙ  有効 無効           ﾓｰﾄﾞの
  22.          D2   CE2　　   CE2(R32) 有効: CE信号出力  CE2　CE2   0   R/W  場合、
  23.                                  無効: DC出力(R3x) 有効 無効           DC出力に
  24.          D1   CE1　　   CE1(R31)                   CE1　CE1   0   R/W  固定
  25.                                                    有効 無効
  26.          D0   CE0　　   CE0(R30)                   CE0　CE0   0   R/W
  27.                                                    有効 無効
  28. 00FF01   D7   SPP7      ｽﾀｯｸﾎﾟｲﾝﾀﾍﾟｰｼﾞｱﾄﾞﾚｽ (MSB)   1    0    0   R/W
  29.          D6   SPP6                                  1    0    0   R/W
  30.          D5   SPP5      <SPﾍﾟｰｼﾞ割り付け可能ｱﾄﾞﾚｽ>  1    0    0   R/W
  31.          D4   SPP4      ｼﾝｸﾞﾙﾁｯﾌﾟﾓｰﾄﾞ: 0ﾍﾟｰｼﾞのみ　 1    0    0   R/W
  32.          D3   SPP3      64Kﾓｰﾄﾞ:       0ﾍﾟｰｼﾞのみ　 1    0    0   R/W
  33.          D2   SPP2      512K(min)ﾓｰﾄﾞ: 0～27Hﾍﾟｰｼﾞ  1    0    0   R/W
  34.          D1   SPP1      512K(max)ﾓｰﾄﾞ: 0～27Hﾍﾟｰｼﾞ  1    0    0   R/W
  35.          D0   SPP0                          (LSB)   1    0    0   R/W
  36. 00FF02   D7   EBR       ﾊﾞｽ解放ｲﾈｰﾌﾞﾙ        K11   BREQ 入力
  37.                                                         ﾎﾟｰﾄ  0   R/W
  38.                         (K11,R51端子仕様)    R51   BACK 出力
  39.                                                         ﾎﾟｰﾄ
  40.                         ｳｪｲﾄｽﾃｰﾄ制御
  41.          D6   WT2        WT2 WT1 WT0 ｽﾃｰﾄ数
  42.                           1   1   1    14
  43.                           1   1   0    12
  44.          D5   WT1         1   0   1    10                     0   R/W
  45.                           1   0   0     8
  46.                           0   1   1     6
  47.          D4   WT1         0   1   0     4
  48.                           0   0   1     2
  49.                           0   0   0  ﾉｰｳｪｲﾄ
  50.          D3   CLKCHG    CPU動作ｸﾛｯｸ切り換え  　　  OSC3 OSC1  0   R/W
  51.          D2   OSCC      OSC3発振On/Off制御   　　   On  Off   0   R/W
  52.                         動作ﾓｰﾄﾞ選択
  53.          D1   VDC1
  54.                         VDC1 VDC0
  55.                           1   ×  高速ﾓｰﾄﾞ
  56.                                   (VD1=3.3V)
  57.                           0    1  低ﾊﾟﾜｰﾓｰﾄﾞ                  0   R/W
  58.          D0   VDC0                (VD1=1.3V)
  59.                           0    0  通常ﾓｰﾄﾞ
  60.                                   (VD1=2.2V)
  61.  
  62. 注!　　アドレス"00FF00H"および"00FF01H"に任意の値をそれぞれ書き込むまで、NMIを含
  63.  　　　めたすべての割り込みはマスクされます。
  64.