The Very Best of Atari Inside

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Text File | 1989-04-23 | 12.5 KB | 349 lines

{------------------------------------------------------------------------------ T R A F F I C L I G H T C O N T R O L E R E X A M P L E ------------------------------------------------------------------------------} ! Reset = 1, C = 0, TL = 0, TS = 0, ST, HL1, HL0, FL1, FL0, Clk = 0 ; ! :, ::, :::; { make a visual break in the timing diagram } ! PalD0, PalD1, PalD2, PalD3, PalD4, PalQ0, PalQ1, PalQ2, PalQ3, PalQ4, Palq01, Palq11, Palq21, Palq31, Palq41 ; { ----------------------------------------------------------- This example is based on the traffic light controller finite state machine described on pages 85 - 88 of "an introduction to VLSI systems" by Carver Mead and Lynn Conway. I have altered the implementation slightly to make it suit a PAL16R8 rather than a chip layout. Mostly this consists of not using 2 signals: Y0 and Y1. I have also added an active high synchronous Reset signal. The system must be clocked twice to reset properly (to state 1). Apart from these changes I have stuck closely to the Mead/Conway original, and used the same signal names and functions. The addition of the Reset signal bears a little discussion. The light controller is a state machine. It works out its next state from its inputs, and the preceding state. If the preceding state is undetermined then the next state will also be undetermined. Without a Reset the power up state (stored in 5 flip-flops) is undetermined. It follows that all subsequent states are also undetermined. In strict terms this is true. Suppose that the real world system had started (by chance) in state 2. The next state would then be state 3. A normal sequence with completely determined states may well be established. Equally however the sequence may start at power up with any other state. Thus even though a normal sequence may be established it is impossible to say what the first, second, or third etc... states are. Lsim is cautious by design, and allows undetermined to propagate easily (see the operator truth tables). This results in a normal state sequence with a chance power up start point being shown as undetermined. Unfortunately not very useful for seeing if the logic is doing what it should. Try, for example, BADLIGHT.LSM which contains the same logic as this file but without the Reset signal. Also see the example SPENB.LSM. Adding a reset makes the power up state determined, and simulation easy. There is a case for making it harder for undetermined to propagate in a simulation. Then it might not be necessary to add resets to make the simulation easy. But this could also hide real world logical flaws. Actually my traffic light controller requires a reset in the real world, a fact which might not be so apparent from the simulation where it not for Lsim's cautious design. It has a 'stuck state' (HL1 = 1, HL0 = 1, FL1 = 1, FL0 = 1) which never changes to any other state. If the power up is left to chance it might come up in the stuck state, and remain there confusing drivers forever. The beautiful approach of the Mead/Conway design to avoiding the need for a reset is not general and is, of course, only applicable to systems having an integral power of 2 number of states. Other techniques for avoiding the need for a real world reset in a state machine may be more trouble than the reset itself. Besides which, quite often the power up state of a state machine can't be left to chance making a reset unavoidable. The traffic light controller is master of a crossroads where a rarely used farm road meets a popular highway. The crossroads incorporates car detectors for traffic waiting on the farm road. Farm road | | | | | | | | HL| C |FL ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ Highway ____________________ ____________________ FL| C |HL | | | | | | | | Key === C = Car detector HL = Traffic lights for highway FL = Traffic lights for farmroad The car detector produces a signal C which is a 1 (logic high) when there is a car waiting on the farm road, and a 0 (logic low) otherwise. The highway traffic lights are controlled by 2 signals called HL0 and HL1. These set the lights as follows:- HL1 HL0 Lights show === === =========== 0 0 Green 0 1 Red 1 0 Yellow The traffic lights for the farm road are similarly controlled by the signals FL0 and FL1. The lights cycle through a pattern of 4 states like this:- Highway lights Farm road lights State number ============== ================ ============ Green Red 0 Yellow Red 1 Red Green 2 Red Yellow 3 Green Red 0 and so on ... There is a timer in the Mead/Conway system which is controlled by 3 signals. A 1 (logic high) on its input ST (Start Timer) resets the timer, making its outputs TS (Time out Short) and TL (Time out Long) go to 0 (logic low). A short time after reset TS goes to 1, and stays there until the next ST. TL goes to 1 a longer time after reset. Thus the waveforms of the timer might look something like this:- ST ______¯¯¯________________________________________________¯¯¯___________ TS ¯¯¯¯¯¯_________¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯_________¯¯¯¯¯ TL ________________________________________________¯¯¯¯¯¯¯¯¯______________ | | | ------>| |<------ Short time out | | | |<------------ Long time out ------------>| The short time out is used to time the yellow period of the lights. The long time out is used for 2 things. It is the minimum time that the highway lights must stay green, and the maximum time that the farm road lights may stay green. The timer is reset at each change of state. The 'default' state of the lights is with the highway lights green (state 0). The lights change to let farm road traffic through only if 2 conditions are met. The highway lights must have been green the minimum amount of time (i.e. the long time out must have expired) and the car detector must have detected a car on the farm road. The farm road lights remain green either for the maximum amount of time (a long time out) or until the car detector indicates no more waiting traffic. Whichever happens soonest triggers the change back to the highway lights being green. We may now draw up a state transition table for the system:- PRESENT STATE INPUTS NEXT STATE OUTPUT ======= ===== ====== ==== ===== ====== State C TL TS State ST ----- - -- -- ----- -- 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 1 0 1 1 2 1 2 1 0 2 0 2 0 3 1 2 1 3 1 3 3 0 3 1 0 1 By replacing the state numbers with the appropriate light control signals we can create the following table:- P R E S E N T S T A T E N E X T S T A T E ============= ========= ======= ========= C TL TS HL1 HL0 FL1 FL0 Product term ST HL1 HL0 FL1 FL0 - -- -- --- --- --- --- ------- ---- -- --- --- --- --- 0 0 0 0 1 /C./HL1./HL0./FL1.FL0 0 0 0 0 1 0 0 0 0 1 /TL./HL1./HL0./FL1.FL0 0 0 0 0 1 1 1 0 0 0 1 C.TL./HL1./HL0./FL1.FL0 1 1 0 0 1 0 1 0 0 1 /TS.HL1./HL0./FL1.FL0 0 1 0 0 1 1 1 0 0 1 TS.HL1./HL0./FL1.FL0 1 0 1 0 0 1 0 0 1 0 0 C./TL./HL1.HL0./FL1./FL0 0 0 1 0 0 0 0 1 0 0 /C./HL1.HL0./FL1./FL0 1 0 1 1 0 1 0 1 0 0 TL./HL1.HL0./FL1./FL0 1 0 1 1 0 0 0 1 1 0 /TS./HL1.HL0.FL1./FL0 0 0 1 1 0 1 0 1 1 0 TS./HL1.HL0.FL1./FL0 1 0 0 0 1 On a PAL16R8 each output cell has a D type flip-flop. However the signal at the output pin of the PAL is the inverse of that clocked into the flip-flop. So when writing equations for the input to these flip-flops we must generate the inverse of the next state signal shown in the table above. Like this:- ------- PAL16R8 style logic for lights controller ------- } ST = /PalQ0 ; PalD0 = /C./HL1./HL0./FL1.FL0 + /TL./HL1./HL0./FL1.FL0 + /TS.HL1./HL0./FL1.FL0 + C./TL./HL1.HL0./FL1./FL0 + /TS./HL1.HL0.FL1./FL0 ; HL1 = /PalQ1 ; PalD1 = /Reset./C./HL1./HL0./FL1.FL0 + /Reset./TL./HL1./HL0./FL1.FL0 + /Reset.TS.HL1./HL0./FL1.FL0 + /Reset.C./TL./HL1.HL0./FL1./FL0 + /Reset./C./HL1.HL0./FL1./FL0 + /Reset.TL./HL1.HL0./FL1./FL0 + /Reset./TS./HL1.HL0.FL1./FL0 + /Reset.TS./HL1.HL0.FL1./FL0 ; HL0 = /PalQ2 ; PalD2 = /C./HL1./HL0./FL1.FL0 + /TL./HL1./HL0./FL1.FL0 + C.TL./HL1./HL0./FL1.FL0 + /TS.HL1./HL0./FL1.FL0 + TS./HL1.HL0.FL1./FL0 + Reset ; FL1 = /PalQ3 ; PalD3 = /C./HL1./HL0./FL1.FL0 + /TL./HL1./HL0./FL1.FL0 + C.TL./HL1./HL0./FL1.FL0 + /TS.HL1./HL0./FL1.FL0 + TS.HL1./HL0./FL1.FL0 + C./TL./HL1.HL0./FL1./FL0 + TS./HL1.HL0.FL1./FL0 + Reset ; FL0 = /PalQ4 ; PalD4 = /Reset.TS.HL1./HL0./FL1.FL0 + /Reset.C./TL./HL1.HL0./FL1./FL0 + /Reset./C./HL1.HL0./FL1./FL0 + /Reset.TL./HL1.HL0./FL1./FL0 + /Reset./TS./HL1.HL0.FL1./FL0 ; { -------------------------------------------------------- As you can see the entire state machine logic fits easily into a single PAL. In fact on a PAL16R8 there are 4 spare inputs, and 3 spare outputs. Using a PAL16R6 would give even greater flexibility in what is left over. When running this simulation you will have to operate the timer and the clock 'by hand', as well as (of course) the car detector input. If you are really enthusiastic about it you could simulate the timer as a shift register driven off the clock, perhaps using the spare flip-flops in the PAL16R8 to divide the clock first. One of the spare flip-flops could be used as synchroniser for the car detector input. Since alas Lsim doesn't (yet) have a primitive operator for a flip- flop we must provide the logic for the flip-flops with gates. I have used the example D type flip-flop from the instruction manual. ---- flip-flop logic for 5 of the flip-flops in a PAL16R8 ---- } PalQ0 = (/Clk + Palq01 + PalD0).(Clk./Palq01.PalD0 + PalQ0); Palq01 = Clk.(Palq01 + /(PalQ0 $ PalD0)); PalQ1 = (/Clk + Palq11 + PalD1).(Clk./Palq11.PalD1 + PalQ1); Palq11 = Clk.(Palq11 + /(PalQ1 $ PalD1)); PalQ2 = (/Clk + Palq21 + PalD2).(Clk./Palq21.PalD2 + PalQ2); Palq21 = Clk.(Palq21 + /(PalQ2 $ PalD2)); PalQ3 = (/Clk + Palq31 + PalD3).(Clk./Palq31.PalD3 + PalQ3); Palq31 = Clk.(Palq31 + /(PalQ3 $ PalD3)); PalQ4 = (/Clk + Palq41 + PalD4).(Clk./Palq41.PalD4 + PalQ4); Palq41 = Clk.(Palq41 + /(PalQ4 $ PalD4));