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Graphics Interchange Format  |  1999-08-03  |  26KB  |  814x1192  |  1-bit (2 colors)
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OCR: 5,926,832 39 40 or more times because the last jump (jg) instruction now As may be seen, the steps which have been removed from points to a jurip address furnished by chaining to another sequence of translated instructions. The chaining process the loop are address generation steps. Thus, address genera- takes the sequence of instructions out of the translator main lion only need be done once per loop invocation in the loop sn that translatinin of the sequence has been completed. improved microprocessor; that is, the address generation need only be done one time. On the other hand, the address generalion hardware of the X86 target processor must gen- Advanced Optimizations, Bockamid Code Motion: 'I'his and sph equent example. sarl with the ende prix In scheduling. crate these addresses cac ...