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SUPER8.DOC
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1990-09-21
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Super8
o The Super8 is a new family of fast 8-bit microprocessors from
Zilog. Some of the features include:
o 325 internal registers. 272 are general purpose and 53 are
used as mode and control registers. Two "windows" of any
eight registers can be assigned as the "working registers" at
any time. These can be accessed very quickly using short form
instructions, though all registers can be accessed at any
time.
o Full duplex UART with built in baud rate generator. Supports
data speeds to 2.5 MB.
o Up to 32 bit programmable I/O lines, w/ 2 handshake channels.
o Interrupts from 27 possible internal and external sources map-
ped into 16 different vectors which can be assigned 8 differ-
ent priority levels.
o Clocks at 20 MHz; some instructions execute in as little as
600 nS (0.6 uS).
o Special fast interrupt mode will service an interrupt in 0.6
uS. (This mode also has the interesting characteristic of
executing different consecutive blocks of code each interrupt;
more conventional interrupt operation is also possible).
o Addresses up to 128k of external memory in two 64k banks (data
and program) if desired. Depending on the memory requirements
of the system, pins not needed as address lines can be as-
signed as additional I/O lines. (An 8k mask ROM version of
the chip is available for use in dedicated controller applica-
tions; however the external memory version is probably of more
interest to the hobbyist).
o Hardware Multiply and Divide instructions.
o Other unusual instructions including nybble swap instructions,
single "jump on bit test" instructions, and special "enter",
"exit" and "next" instructions. These directly support higher
level threaded-code languages such as Forth, using a register
called the "IP" (Instruction Pointer), a register which is
somewhat analogous to the Program Counter in the context of
the high level language environment.
o On chip oscillator directly drives crystal.
o Two built-in counter/timers.
o Built in DMA channel to allow high speed data transfers.
o ==> Cost less than $5.00.
Zilog has been offering a development kit for $88 in conjunction
with a promotional contest they are running (1st prize for best
design: $5000). The kit comes complete with a set of data man-
uals, a cross assembler which will run on an IBM PC, and a devel-
opment board which you hook up to your PC's serial port. On the
board is ZO880020 uP (48 pin DIP, 20 Mhz, no internal ROM ver-
sion), an EPROM with a debug monitor and RAM to download your
program to. Provision is made for a connector to pick up all the
I/O lines. The only other chips needed are 3 TTL "glue" chips
and an RS-232 driver (the monitor makes use of the on board UART
to perform communication with the host PC).
Not content with this, Jeff Wilson, an associate of mine, decided
to write a CP/M (Z-80 only) cross assembler which will run far
faster than the MS-DOS one supplied by Zilog. Though the final
product is to be commercial, Jeff has generously made a major
portion of the assembler available for no charge to interested
parties. He has also re-written the monitor, making substantial
improvements. Included in this library is the following:
XS8.COM The CP/M Z-80 --> Super8 cross-assembler itself, a
major subset of the full version.
XS8.DOC Preliminary documentation for the assembler.
MON.S8 Super8 source code for the monitor; assembles w/ XS8.
SUPER8.DOC This text. All files except this text were written by
Jeff D. Wilson.
T.S8 Every S8 source instruction in one file, can be assem-
bled as a test of XS8. Note that the XS8 assembler
has all 53 special register names, as defined by
Zilog, as reserved words which are predefined with
their proper register value, eliminating the necessity
of a large number of EQU's (Memorizing the names and
functions of these 53 registers should take some time;
especially as many of them are bit mapped in their
functionality!)
FORTH.S8 S8 source defining enough Forth primitives to perform
the "sieve benchmark". The words are placed in a list,
creating a Forth implementation of the benchmark,
which runs extremely fast. See the documentation.
Additional Notes: The monitor code supplied would be a useful
development tool whether or not it is used with the so called
"contest board" supplied in the Zilog Kit. The basic hardware
requirements are the processor itself, 16k ROM at low memory
(containing the monitor code), and much development RAM as you
want starting at the top of memory. An RS-232 connector should be
connected to the uP's UART pins for communicating with the CP/M
host machine (only TX, RX, and GND req'd). Note that the UART
interrupts are routed indirectly through a jump in RAM, so a
program under development could intercept the UART calls. This
would allow the program under development to share the use of the
UART with the program being developed.
*****
"Super8" is a trademark of Zilog, Inc. Neither Jeff Wilson nor I
have any affiliation with Zilog, Inc. The XS8 assembler included
is not a Zilog product, and is not supported by them (or neces-
sarily anyone else, for that matter). This is "Beta-test"
experimental material, and is offered "as is" for personal, non-
profit use only. See documentation for additional information.
Comments, questions, bug reports, inquiries, or just for possible
updates- call Jeff directly (see documentation) or leave a mes-
sage at my data number.
- Steven Greenberg
21 March 1987
Data: (201) 447-6543
[24 hrs; 1200 baud]