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super8.arc
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T.S8
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1990-09-21
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5KB
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501 lines
; Super8 assembly test file
adc r3,r5
adc r3,@r5
adc r3,64
adc 32,r5
adc 32,64
adc r3,@64
adc 32,@r5
adc 32,@64
adc r3,#64
adc 32,#64
add r3,r5
add r3,@r5
add r3,64
add 32,r5
add 32,64
add r3,@64
add 32,@r5
add 32,@64
add r3,#64
add 32,#64
and r3,r5
and r3,@r5
and r3,64
and 32,r5
and 32,64
and r3,@64
and 32,@r5
and 32,@64
and r3,#64
and 32,#64
band r3,r5,#7
band r3,64,#7
band r3,#7,r5
band 32,#7,r5
bcp r3,r5,#7
bcp r3,64,#7
bitc r3,#7
bitr r3,#7
bits r3,#7
bor r3,r5,#7
bor r3,64,#7
bor r3,#7,r5
bor 32,#7,r5
btjrf $,r5,#7
btjrt $,r5,#7
bxor r3,r5,#7
bxor r3,64,#7
bxor r3,#7,r5
bxor 32,#7,r5
call #32
call @rr2
call @32
call 64
ccf
clr r3
clr 32
clr @r3
clr @32
com r3
com 32
com @r3
com @32
cp r3,r5
cp r3,@r5
cp r3,64
cp 32,r5
cp 32,64
cp r3,@64
cp 32,@r5
cp 32,@64
cp r3,#64
cpijne r3,@r5,$
cpije r3,@r5,$
da r3
da 32
da @r3
da @32
dec r3
dec 32
dec @r3
dec @32
decw rr2
decw 32
decw @r3
decw @32
di
div rr2,r5
div rr2,64
div 32,r5
div 32,64
div rr2,@r5
div rr2,@64
div 32,@r5
div 32,@64
div rr2,#64
div 32,#64
djnz r3,$
ei
enter
exit
inc r3
inc 32
inc @r3
inc @32
incw rr2
incw 32
incw @r3
incw @32
iret
jp 1024
jp nz,1024
jp @rr2
jp @32
jr $
jr nz,$
ld r3,#64
ld r3,r5
ld r3,64
ld 32,r5
ld r3,@r5
ld @r3,r5
ld 32,64
ld r3,@r5 ; duplicate
ld r3,@64
ld 32,@r5
ld 32,@64
ld r3,#64
ld 32,#64
ld @r3,#64
ld @32,#64
ld @r3,r5 ; duplicate
ld @r3,64
ld @32,r5
ld @32,64
ld r3,64(r5)
ld 64(r5),r3
ldb r3,r5,#7
ldb r3,64,#7
ldb r3,#7,r5
ldb 32,#7,r5
ldc r3,1024(rr4)
ldc r3,64(rr4)
ldc 1024(rr2),r5
ldc 64(rr2),r5
ldc 32,r5
ldc r5,64
ldc r3,@rr4
ldc @rr2,r5
ldcd r3,@rr4
ldci r3,@rr4
ldcpd @rr2,r5
ldcpi @rr2,r5
lde r3,1024(rr4)
lde r3,64(rr4)
lde 1024(rr2),r5
lde 64(rr2),r5
lde 32,r5
lde r5,64
lde r3,@rr4
lde @rr2,r5
lded r3,@rr4
ldei r3,@rr4
ldepd @rr2,r5
ldepi @rr2,r5
ldw rr2,rr4
ldw rr2,64
ldw 32,rr4
ldw 32,64
ldw rr2,@r4
ldw rr2,@64
ldw 32,@r4
ldw 32,@64
ldw rr2,#1024
ldw 32,#1024
mult rr2,r5
mult rr2,64
mult 32,r5
mult 32,64
mult rr2,@r5
mult rr2,@64
mult 32,@r5
mult 32,@64
mult rr2,#64
mult 32,#64
next
nop
or r3,r5
or r3,@r5
or r3,64
or 32,r5
or 32,64
or r3,@64
or 32,@r5
or 32,@64
or r3,#64
or 32,#64
pop r3
pop 32
pop @r3
pop @32
popud r3,@r5
popud r3,@64
popud 32,@r5
popud 32,@64
popui r3,@r5
popui r3,@64
popui 32,@r5
popui 32,@64
push r3
push 32
push @r3
push @32
pushud @r3,r5
pushud @r3,64
pushud @32,r5
pushud @32,64
pushui @r3,r5
pushui @r3,64
pushui @32,r5
pushui @32,64
rcf
dw 0 ; rdr in book
ret
rl r3
rl 32
rl @r3
rl @32
rlc r3
rlc 32
rlc @r3
rlc @32
rr r3
rr 32
rr @r3
rr @32
rrc r3
rrc 32
rrc @r3
rrc @32
sb0
sb1
sbc r3,r5
sbc r3,@r5
sbc r3,64
sbc 32,r5
sbc 32,64
sbc r3,@64
sbc 32,@r5
sbc 32,@64
sbc r3,#64
sbc 32,#64
scf
sra r3
sra 32
sra @r3
sra @32
srp #128
srp1 #128
srp0 #128
sub r3,r5
sub r3,@r5
sub r3,64
sub 32,r5
sub 32,64
sub r3,@64
sub 32,@r5
sub 32,@64
sub r3,#64
sub 32,#64
swap r3
swap 32
swap @r3
swap @32
tcm r3,r5
tcm r3,@r5
tcm r3,64
tcm 32,r5
tcm 32,64
tcm r3,@64
tcm 32,@r5
tcm 32,@64
tcm r3,#64
tcm 32,#64
tm r3,r5
tm r3,@r5
tm r3,64
tm 32,r5
tm 32,64
tm r3,@64
tm 32,@r5
tm 32,@64
tm r3,#64
tm 32,#64
xor r3,r5
xor r3,@r5
xor r3,64
xor 32,r5
xor 32,64
xor r3,@64
xor 32,@r5
xor 32,@64
xor r3,#64
xor 32,#64
lcode: wfi ; $308
; Defined register names
ld r3,sym
ld r3,imr
ld r3,irq ; Was irr in test listing
ldw rr3,ip
ld r3,ipl
ld r3,iph
ldw rr3,sp
ld r3,spl
ld r3,sph
ld r3,rp1
ld r3,rp0
ld r3,flags
ld r3,p4
ld r3,p3
ld r3,p2
ld r3,p1
ld r3,p0
; Bank 0 special registers
ld r3,ipr
ld r3,emt
ld r3,p2bip
ld r3,p2aip
ld r3,p2dm
ld r3,p2cm
ld r3,p2bm
ld r3,p2am
ld r3,p4od
ld r3,p4d
ld r3,h1c
ld r3,h0c
ld r3,pm
ld r3,p1
ld r3,p0m
ld r3,uie
ld r3,urc
ld r3,utc
ld r3,sio
ld r3,sie
ld r3,srcb
ld r3,srca
ld r3,stc
ldw rr2,c1c
ld r3,c1cl
ld r3,c1ch
ldw rr2,c0c
ld r3,c0cl
ld r3,c0ch
ld r3,c1ct
ld r3,c0ct
; Bank 1 special registers
ld r3,wumsk
ld r3,wumch
ld r3,umb
ld r3,uma
ldw rr2,ubg
ld r3,ubgl
ld r3,ubgh
ldw rr2,dc
ld r3,dcl
ld r3,dch
ldw rr2,syn
ld r3,synh
ld r3,synl
ld r3,smd
ld r3,smc
ld r3,smb
ld r3,sma
ldw rr2,sbg
ld r3,sbgl
ld r3,sbgh
ldw rr2,c1tc
ld r3,c1tcl
ld r3,c1tch
ldw rr2,c0tc
ld r3,c0tcl
ld r3,c0tch
ld r3,c1m
ld r3,c0m
; Test for conditionals
jp f,128
jp z,128
jp nz,128
jp eq,128
jp ne,128
jp c,128
jp nc,128
jp gt,128
jp lt,128
jp ge,128
jp le,128
jp pl,128
jp mi,128
jp nov,128
jp ov,128
jp ugt,128
jp ult,128
jp uge,128
jp ule,128
end