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The Datafile PD-CD 4
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DATAFILE_PDCD4.iso
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unix
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unixlib36d
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src
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sys
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s
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_signal
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1994-02-26
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7KB
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238 lines
; /* _signal.s (c) Copyright 1990 H.Rogers */
GET @.src.sys.s.asm_dec
AREA |C$$code|,CODE,READONLY
IMPORT |__raise|
EXPORT raise
NAME raise
raise
CMP a1,#0
MOVEQS pc,lr
STMFD sp,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr,pc}
SUB sp,sp,#64
SUB ip,pc,#4
MOV a4,lr
ADD a3,sp,#64
ORR a2,fp,#&80000000 ; for __backtrace()
STMFD sp!,{a2,a3,a4,ip} ; create signal frame
ADD fp,sp,#12
MOV v1,sp
BL |__raise|
ADD sp,v1,#16 ; skip signal frame
LDMFD sp,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,pc}^
IMPORT |__backtrace|
EXPORT |__core|
NAME __core
|__core|
MOV a1,fp
B |__backtrace|
AREA |C$$wrcode|,CODE
EXPORT |__h_sigill|
NAME __h_sigill
|__h_sigill|
STR lr,[pc,#|__cbreg|-.-8+60]
ADR lr,|__cbreg|
STMIA lr,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr}^
MOV a1,#4 ; SIGILL = 4
STR a1,[pc,#|__cba1|-.-8]
B |__h_cback|
EXPORT |__h_sigbus|
NAME __h_sigbus
|__h_sigbus|
SUB lr,lr,#4
STR lr,[pc,#|__cbreg|-.-8+60]
ADR lr,|__cbreg|
STMIA lr,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr}^
MOV a1,#10 ; SIGBUS = 10
STR a1,[pc,#|__cba1|-.-8]
B |__h_cback|
EXPORT |__h_sigsegv0|
NAME __h_sigsegv0
|__h_sigsegv0|
SUB lr,lr,#4
STR lr,[pc,#|__cbreg|-.-8+60]
ADR lr,|__cbreg|
STMIA lr,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr}^
MOV a1,#11 ; SIGSEGV = 11
STR a1,[pc,#|__cba1|-.-8]
B |__h_cback|
EXPORT |__h_sigsegv1| ; FIXME need to undo any writebacked LDM/STMs
NAME __h_sigsegv1
|__h_sigsegv1|
SUB lr,lr,#8
STR lr,[pc,#|__cbreg|-.-8+60]
ADR lr,|__cbreg|
STMIA lr,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr}^
MOV a1,#11 ; SIGSEGV = 11
STR a1,[pc,#|__cba1|-.-8]
B |__h_cback|
EXPORT |__h_errbuf|
|__h_errbuf|
DCD 0
EXPORT |__h_error|
NAME __h_error
|__h_error|
ADR lr,|__cbreg|
STMIA lr,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr}^
LDR a3,[pc,#|__h_errbuf|-.-8]
LDR a1,[pc,#errno_ptr-.-8]
MOV a2,#36 ; EOS = 36
STR a2,[a1,#0]
LDR a1,[pc,#sys_errlist_ptr-.-8]
ADD a2,a3,#8
STR a2,[a1,#144] ; (EOS<<2) = 144
LDR a2,[a3,#0]
STR a2,[pc,#|__cbreg|-.-8+60]
MOV a2,#2
STR a2,[pc,#|__cbflg|-.-8] ; set __cbflg bit 1
LDR a2,[a3,#4]
TST a2,#&80000000
BNE |__h_emt|
MOV a1,#20 ; SIGERR = 20
STR a1,[pc,#|__cba1|-.-8]
B |__h_cback|
|__h_emt|
BIC a2,a2,#&80000000
MOV a2,a2,LSR #8
CMP a2,#&0002
MOVEQ a1,#8 ; SIGFPE = 8
MOVNE a1,#7 ; SIGEMT = 7
STR a1,[pc,#|__cba1|-.-8]
B |__h_cback|
IMPORT |__errno|
errno_ptr
DCD |__errno|
IMPORT sys_errlist
sys_errlist_ptr
DCD sys_errlist
EXPORT |__h_sigint|
NAME __h_sigint
|__h_sigint|
TST fp,#64 ; Escape condition?
MOVEQS pc,lr
MOV ip,#2 ; SIGINT = 2
STR ip,[pc,#|__cba1|-.-8]
MOV ip,#1 ; set CallBack
STR ip,[pc,#|__cbflg|-.-8] ; set __cbflg bit 0
MOVS pc,lr
EXPORT |__h_event|
NAME __h_event
|__h_event|
MOVS pc,lr
EXPORT |__h_sigsys|
NAME __h_sigsys
|__h_sigsys|
ADR ip,|__cbreg|
STMIA ip,{lr}
MOV ip,#12 ; SIGSYS = 12
STR ip,[pc,#|__cba1|-.-8]
ORR ip,pc,#3 ; SVC mode
TEQP ip,#0
MOVNV ip,ip
STMFD sp!,{lr}
SWI &2001b ; OS_SetCallBack
LDMFD sp!,{lr}
ADR ip,|__cbreg|
LDMIA ip,{pc}^
EXPORT |__h_sigalrm|
NAME __h_sigalrm
|__h_sigalrm|
ADR ip,|__cbreg|
STMIA ip,{lr}
MOV ip,#14 ; SIGALRM = 14
STR ip,[pc,#|__cba1|-.-8]
ORR ip,pc,#3 ; SVC mode
TEQP ip,#0
MOVNV ip,ip
STMFD sp!,{lr}
SWI &2001b ; OS_SetCallBack
LDMFD sp!,{lr}
ADR ip,|__cbreg|
LDMIA ip,{pc}^
EXPORT |__h_cback|
NAME __h_cback
|__h_cback|
ORR lr,pc,#&0c000000 ; USR mode IntOff
MOVS pc,lr
MOVNV a1,a1
ADR lr,|__cbreg| ; load USR reg.s
LDMIA lr,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr}
SUB sp,sp,#4
STMFD sp!,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr}
LDR a4,[pc,#|__cbreg|-.-8+60]
STR a4,[sp,#60] ; saved USR pc
LDR a1,[pc,#|__cbflg|-.-8]
ANDS a1,a1,#2 ; check __cbflg bit 1
SUBNE a4,a4,#4
MOV a3,lr ; saved USR lr
ADD a2,sp,#64 ; saved USR sp
ORR a1,fp,#&80000000 ; saved USR fp | 0x80000000
STMFD sp!,{a1,a2,a3,a4} ; create signal frame
ADD fp,sp,#12
SWI &20013 ; OS_IntOn
LDR a1,[pc,#|__cbflg|-.-8] ; check __cbflg bit 0
ANDS a1,a1,#1
BEQ |__h_cback_l1|
MOV a1,#&7c ; clear Escape condition
SWI &20006
|__h_cback_l1|
MOV a1,#0
STR a1,[pc,#|__cbflg|-.-8]
LDR a1,[pc,#|__cba1|-.-8]
MOV v1,sp
BL |__raise|
ADD sp,v1,#16 ; skip signal frame
LDMFD sp,{a1,a2,a3,a4,v1,v2,v3,v4,v5,v6,sl,fp,ip,sp,lr,pc}^
EXPORT |__cbreg|
|__cbreg|
% 64
; bit 0 Escape condition flag
; bit 1 no re-execute inst. flag
|__cbflg|
DCD 0
|__cba1|
DCD 0
IMPORT |_exit|
EXPORT |__h_exit|
NAME __h_exit
|__h_exit|
ORR lr,pc,#&0c000000 ; USR mode IntOff
MOVS pc,lr
MOVNV a1,a1
MOV a1,#0
B |_exit|
END